549 lines
33 KiB
ArmAsm
549 lines
33 KiB
ArmAsm
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.text
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.file "vecadd.cu"
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.globl _Z21__device_stub__vecAddPdS_S_i # -- Begin function _Z21__device_stub__vecAddPdS_S_i
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.p2align 4, 0x90
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.type _Z21__device_stub__vecAddPdS_S_i,@function
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_Z21__device_stub__vecAddPdS_S_i: # @_Z21__device_stub__vecAddPdS_S_i
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.cfi_startproc
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# %bb.0:
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pushq %rbp
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.cfi_def_cfa_offset 16
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.cfi_offset %rbp, -16
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movq %rsp, %rbp
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.cfi_def_cfa_register %rbp
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subq $160, %rsp
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movq %rdi, -8(%rbp)
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movq %rsi, -16(%rbp)
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movq %rdx, -24(%rbp)
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movl %ecx, -28(%rbp)
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leaq -8(%rbp), %rax
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movq %rax, -144(%rbp)
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leaq -16(%rbp), %rax
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movq %rax, -136(%rbp)
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leaq -24(%rbp), %rax
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movq %rax, -128(%rbp)
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leaq -28(%rbp), %rax
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movq %rax, -120(%rbp)
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leaq -40(%rbp), %rdi
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leaq -56(%rbp), %rsi
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leaq -64(%rbp), %rdx
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leaq -72(%rbp), %rcx
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callq __cudaPopCallConfiguration@PLT
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movq -64(%rbp), %r10
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movq -72(%rbp), %rax
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movq -40(%rbp), %rcx
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movq %rcx, -88(%rbp)
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movl -32(%rbp), %ecx
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movl %ecx, -80(%rbp)
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movq -88(%rbp), %rsi
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movl -80(%rbp), %edx
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movq -56(%rbp), %rcx
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movq %rcx, -104(%rbp)
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movl -48(%rbp), %ecx
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movl %ecx, -96(%rbp)
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movq -104(%rbp), %rcx
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movl -96(%rbp), %r8d
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leaq _Z21__device_stub__vecAddPdS_S_i(%rip), %rdi
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leaq -144(%rbp), %r9
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movq %r10, (%rsp)
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movq %rax, 8(%rsp)
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callq cudaLaunchKernel@PLT
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# %bb.1:
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addq $160, %rsp
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popq %rbp
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.cfi_def_cfa %rsp, 8
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retq
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.Lfunc_end0:
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.size _Z21__device_stub__vecAddPdS_S_i, .Lfunc_end0-_Z21__device_stub__vecAddPdS_S_i
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.cfi_endproc
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# -- End function
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.section .rodata.cst8,"aM",@progbits,8
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.p2align 3 # -- Begin function main
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.LCPI1_0:
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.quad 0x3eb0c6f7a0b5ed8d # double 9.9999999999999995E-7
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.LCPI1_1:
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.quad 0x3ff0000000000000 # double 1
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.text
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.globl main
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.p2align 4, 0x90
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.type main,@function
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main: # @main
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.cfi_startproc
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# %bb.0:
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pushq %rbp
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.cfi_def_cfa_offset 16
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.cfi_offset %rbp, -16
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movq %rsp, %rbp
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.cfi_def_cfa_register %rbp
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subq $176, %rsp
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movl $0, -4(%rbp)
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movl %edi, -8(%rbp)
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movq %rsi, -16(%rbp)
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movl $100000, -20(%rbp) # imm = 0x186A0
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movslq -20(%rbp), %rax
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shlq $3, %rax
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movq %rax, -80(%rbp)
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movq -80(%rbp), %rdi
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callq malloc@PLT
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movq %rax, -32(%rbp)
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movq -80(%rbp), %rdi
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callq malloc@PLT
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movq %rax, -40(%rbp)
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movq -80(%rbp), %rdi
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callq malloc@PLT
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movq %rax, -48(%rbp)
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movq -80(%rbp), %rsi
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leaq -56(%rbp), %rdi
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callq _ZL10cudaMallocIdE9cudaErrorPPT_m
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movq -80(%rbp), %rsi
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leaq -64(%rbp), %rdi
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callq _ZL10cudaMallocIdE9cudaErrorPPT_m
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movq -80(%rbp), %rsi
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leaq -72(%rbp), %rdi
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callq _ZL10cudaMallocIdE9cudaErrorPPT_m
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movl $0, -84(%rbp)
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.LBB1_1: # =>This Inner Loop Header: Depth=1
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movl -84(%rbp), %eax
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cmpl -20(%rbp), %eax
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jge .LBB1_4
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# %bb.2: # in Loop: Header=BB1_1 Depth=1
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movl -84(%rbp), %edi
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callq _ZSt3sinIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_
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movsd %xmm0, -176(%rbp) # 8-byte Spill
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movl -84(%rbp), %edi
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callq _ZSt3sinIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_
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movaps %xmm0, %xmm1
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movsd -176(%rbp), %xmm0 # 8-byte Reload
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# xmm0 = mem[0],zero
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mulsd %xmm1, %xmm0
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movq -32(%rbp), %rax
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movslq -84(%rbp), %rcx
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movsd %xmm0, (%rax,%rcx,8)
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movl -84(%rbp), %edi
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callq _ZSt3cosIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_
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movsd %xmm0, -168(%rbp) # 8-byte Spill
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movl -84(%rbp), %edi
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callq _ZSt3cosIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_
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movaps %xmm0, %xmm1
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movsd -168(%rbp), %xmm0 # 8-byte Reload
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# xmm0 = mem[0],zero
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mulsd %xmm1, %xmm0
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movq -40(%rbp), %rax
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movslq -84(%rbp), %rcx
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movsd %xmm0, (%rax,%rcx,8)
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# %bb.3: # in Loop: Header=BB1_1 Depth=1
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movl -84(%rbp), %eax
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addl $1, %eax
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movl %eax, -84(%rbp)
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jmp .LBB1_1
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.LBB1_4:
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movq -56(%rbp), %rdi
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movq -32(%rbp), %rsi
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movq -80(%rbp), %rdx
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movl $1, %ecx
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callq cudaMemcpy@PLT
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movq -64(%rbp), %rdi
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movq -40(%rbp), %rsi
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movq -80(%rbp), %rdx
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movl $1, %ecx
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callq cudaMemcpy@PLT
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movl $1024, -88(%rbp) # imm = 0x400
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cvtsi2ssl -20(%rbp), %xmm0
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cvtsi2ssl -88(%rbp), %xmm1
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divss %xmm1, %xmm0
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callq _ZSt4ceilf
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cvttss2si %xmm0, %eax
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movl %eax, -92(%rbp)
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movl -92(%rbp), %esi
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leaq -104(%rbp), %rdi
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movl $1, %ecx
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movl %ecx, %edx
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callq _ZN4dim3C2Ejjj
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movl -88(%rbp), %esi
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leaq -120(%rbp), %rdi
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movl $1, %ecx
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movl %ecx, %edx
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callq _ZN4dim3C2Ejjj
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movq -104(%rbp), %rax
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movq %rax, -136(%rbp)
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movl -96(%rbp), %eax
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movl %eax, -128(%rbp)
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movq -136(%rbp), %rdi
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movl -128(%rbp), %esi
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movq -120(%rbp), %rax
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movq %rax, -152(%rbp)
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movl -112(%rbp), %eax
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movl %eax, -144(%rbp)
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movq -152(%rbp), %rdx
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movl -144(%rbp), %ecx
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xorl %eax, %eax
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movl %eax, %r9d
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movq %r9, %r8
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callq __cudaPushCallConfiguration@PLT
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cmpl $0, %eax
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jne .LBB1_6
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# %bb.5:
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movq -56(%rbp), %rdi
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movq -64(%rbp), %rsi
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movq -72(%rbp), %rdx
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movl -20(%rbp), %ecx
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callq _Z21__device_stub__vecAddPdS_S_i
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.LBB1_6:
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movq -48(%rbp), %rdi
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movq -72(%rbp), %rsi
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movq -80(%rbp), %rdx
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movl $2, %ecx
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callq cudaMemcpy@PLT
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xorps %xmm0, %xmm0
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movsd %xmm0, -160(%rbp)
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movl $0, -84(%rbp)
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.LBB1_7: # =>This Inner Loop Header: Depth=1
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movl -84(%rbp), %eax
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cmpl -20(%rbp), %eax
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jge .LBB1_10
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# %bb.8: # in Loop: Header=BB1_7 Depth=1
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movq -48(%rbp), %rax
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movslq -84(%rbp), %rcx
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movsd (%rax,%rcx,8), %xmm0 # xmm0 = mem[0],zero
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addsd -160(%rbp), %xmm0
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movsd %xmm0, -160(%rbp)
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# %bb.9: # in Loop: Header=BB1_7 Depth=1
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movl -84(%rbp), %eax
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addl $1, %eax
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movl %eax, -84(%rbp)
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jmp .LBB1_7
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.LBB1_10:
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cvtsi2sdl -20(%rbp), %xmm1
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movsd -160(%rbp), %xmm0 # xmm0 = mem[0],zero
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divsd %xmm1, %xmm0
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movsd %xmm0, -160(%rbp)
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movsd -160(%rbp), %xmm0 # xmm0 = mem[0],zero
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movsd .LCPI1_1(%rip), %xmm1 # xmm1 = mem[0],zero
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subsd %xmm1, %xmm0
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callq _ZSt3absd
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movaps %xmm0, %xmm1
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movsd .LCPI1_0(%rip), %xmm0 # xmm0 = mem[0],zero
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ucomisd %xmm1, %xmm0
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jbe .LBB1_12
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# %bb.11:
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leaq .L.str(%rip), %rdi
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movb $0, %al
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callq printf@PLT
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jmp .LBB1_13
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.LBB1_12:
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leaq .L.str.1(%rip), %rdi
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movb $0, %al
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callq printf@PLT
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.LBB1_13:
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movq -56(%rbp), %rdi
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callq cudaFree@PLT
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movq -64(%rbp), %rdi
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callq cudaFree@PLT
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movq -72(%rbp), %rdi
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callq cudaFree@PLT
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movq -32(%rbp), %rdi
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callq free@PLT
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movq -40(%rbp), %rdi
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callq free@PLT
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movq -48(%rbp), %rdi
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callq free@PLT
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xorl %eax, %eax
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addq $176, %rsp
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popq %rbp
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.cfi_def_cfa %rsp, 8
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retq
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.Lfunc_end1:
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.size main, .Lfunc_end1-main
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.cfi_endproc
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# -- End function
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.p2align 4, 0x90 # -- Begin function _ZL10cudaMallocIdE9cudaErrorPPT_m
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.type _ZL10cudaMallocIdE9cudaErrorPPT_m,@function
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_ZL10cudaMallocIdE9cudaErrorPPT_m: # @_ZL10cudaMallocIdE9cudaErrorPPT_m
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.cfi_startproc
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# %bb.0:
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pushq %rbp
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.cfi_def_cfa_offset 16
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.cfi_offset %rbp, -16
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movq %rsp, %rbp
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.cfi_def_cfa_register %rbp
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subq $16, %rsp
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movq %rdi, -8(%rbp)
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movq %rsi, -16(%rbp)
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movq -8(%rbp), %rdi
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movq -16(%rbp), %rsi
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callq cudaMalloc@PLT
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addq $16, %rsp
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popq %rbp
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.cfi_def_cfa %rsp, 8
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retq
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.Lfunc_end2:
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.size _ZL10cudaMallocIdE9cudaErrorPPT_m, .Lfunc_end2-_ZL10cudaMallocIdE9cudaErrorPPT_m
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.cfi_endproc
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# -- End function
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.section .text._ZSt3sinIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_,"axG",@progbits,_ZSt3sinIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_,comdat
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.weak _ZSt3sinIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_ # -- Begin function _ZSt3sinIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_
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.p2align 4, 0x90
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.type _ZSt3sinIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_,@function
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_ZSt3sinIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_: # @_ZSt3sinIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_
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.cfi_startproc
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# %bb.0:
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pushq %rbp
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.cfi_def_cfa_offset 16
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.cfi_offset %rbp, -16
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movq %rsp, %rbp
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.cfi_def_cfa_register %rbp
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subq $16, %rsp
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movl %edi, -4(%rbp)
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cvtsi2sdl -4(%rbp), %xmm0
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callq sin@PLT
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addq $16, %rsp
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popq %rbp
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.cfi_def_cfa %rsp, 8
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retq
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.Lfunc_end3:
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.size _ZSt3sinIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_, .Lfunc_end3-_ZSt3sinIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_
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.cfi_endproc
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# -- End function
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.section .text._ZSt3cosIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_,"axG",@progbits,_ZSt3cosIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_,comdat
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.weak _ZSt3cosIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_ # -- Begin function _ZSt3cosIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_
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.p2align 4, 0x90
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.type _ZSt3cosIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_,@function
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_ZSt3cosIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_: # @_ZSt3cosIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_
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.cfi_startproc
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# %bb.0:
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pushq %rbp
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.cfi_def_cfa_offset 16
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.cfi_offset %rbp, -16
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movq %rsp, %rbp
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.cfi_def_cfa_register %rbp
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subq $16, %rsp
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movl %edi, -4(%rbp)
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cvtsi2sdl -4(%rbp), %xmm0
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callq cos@PLT
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addq $16, %rsp
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popq %rbp
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.cfi_def_cfa %rsp, 8
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retq
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.Lfunc_end4:
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.size _ZSt3cosIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_, .Lfunc_end4-_ZSt3cosIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_
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.cfi_endproc
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# -- End function
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.section .text._ZSt4ceilf,"axG",@progbits,_ZSt4ceilf,comdat
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.weak _ZSt4ceilf # -- Begin function _ZSt4ceilf
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.p2align 4, 0x90
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.type _ZSt4ceilf,@function
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_ZSt4ceilf: # @_ZSt4ceilf
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.cfi_startproc
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|
# %bb.0:
|
||
|
pushq %rbp
|
||
|
.cfi_def_cfa_offset 16
|
||
|
.cfi_offset %rbp, -16
|
||
|
movq %rsp, %rbp
|
||
|
.cfi_def_cfa_register %rbp
|
||
|
subq $16, %rsp
|
||
|
movss %xmm0, -4(%rbp)
|
||
|
movss -4(%rbp), %xmm0 # xmm0 = mem[0],zero,zero,zero
|
||
|
callq ceilf@PLT
|
||
|
addq $16, %rsp
|
||
|
popq %rbp
|
||
|
.cfi_def_cfa %rsp, 8
|
||
|
retq
|
||
|
.Lfunc_end5:
|
||
|
.size _ZSt4ceilf, .Lfunc_end5-_ZSt4ceilf
|
||
|
.cfi_endproc
|
||
|
# -- End function
|
||
|
.section .text._ZN4dim3C2Ejjj,"axG",@progbits,_ZN4dim3C2Ejjj,comdat
|
||
|
.weak _ZN4dim3C2Ejjj # -- Begin function _ZN4dim3C2Ejjj
|
||
|
.p2align 4, 0x90
|
||
|
.type _ZN4dim3C2Ejjj,@function
|
||
|
_ZN4dim3C2Ejjj: # @_ZN4dim3C2Ejjj
|
||
|
.cfi_startproc
|
||
|
# %bb.0:
|
||
|
pushq %rbp
|
||
|
.cfi_def_cfa_offset 16
|
||
|
.cfi_offset %rbp, -16
|
||
|
movq %rsp, %rbp
|
||
|
.cfi_def_cfa_register %rbp
|
||
|
movq %rdi, -8(%rbp)
|
||
|
movl %esi, -12(%rbp)
|
||
|
movl %edx, -16(%rbp)
|
||
|
movl %ecx, -20(%rbp)
|
||
|
movq -8(%rbp), %rax
|
||
|
movl -12(%rbp), %ecx
|
||
|
movl %ecx, (%rax)
|
||
|
movl -16(%rbp), %ecx
|
||
|
movl %ecx, 4(%rax)
|
||
|
movl -20(%rbp), %ecx
|
||
|
movl %ecx, 8(%rax)
|
||
|
popq %rbp
|
||
|
.cfi_def_cfa %rsp, 8
|
||
|
retq
|
||
|
.Lfunc_end6:
|
||
|
.size _ZN4dim3C2Ejjj, .Lfunc_end6-_ZN4dim3C2Ejjj
|
||
|
.cfi_endproc
|
||
|
# -- End function
|
||
|
.section .rodata.cst16,"aM",@progbits,16
|
||
|
.p2align 4 # -- Begin function _ZSt3absd
|
||
|
.LCPI7_0:
|
||
|
.quad 0x7fffffffffffffff # double NaN
|
||
|
.quad 0x7fffffffffffffff # double NaN
|
||
|
.section .text._ZSt3absd,"axG",@progbits,_ZSt3absd,comdat
|
||
|
.weak _ZSt3absd
|
||
|
.p2align 4, 0x90
|
||
|
.type _ZSt3absd,@function
|
||
|
_ZSt3absd: # @_ZSt3absd
|
||
|
.cfi_startproc
|
||
|
# %bb.0:
|
||
|
pushq %rbp
|
||
|
.cfi_def_cfa_offset 16
|
||
|
.cfi_offset %rbp, -16
|
||
|
movq %rsp, %rbp
|
||
|
.cfi_def_cfa_register %rbp
|
||
|
movsd %xmm0, -8(%rbp)
|
||
|
movsd -8(%rbp), %xmm0 # xmm0 = mem[0],zero
|
||
|
movaps .LCPI7_0(%rip), %xmm1 # xmm1 = [NaN,NaN]
|
||
|
pand %xmm1, %xmm0
|
||
|
popq %rbp
|
||
|
.cfi_def_cfa %rsp, 8
|
||
|
retq
|
||
|
.Lfunc_end7:
|
||
|
.size _ZSt3absd, .Lfunc_end7-_ZSt3absd
|
||
|
.cfi_endproc
|
||
|
# -- End function
|
||
|
.text
|
||
|
.p2align 4, 0x90 # -- Begin function __cuda_register_globals
|
||
|
.type __cuda_register_globals,@function
|
||
|
__cuda_register_globals: # @__cuda_register_globals
|
||
|
.cfi_startproc
|
||
|
# %bb.0:
|
||
|
subq $40, %rsp
|
||
|
.cfi_def_cfa_offset 48
|
||
|
leaq _Z21__device_stub__vecAddPdS_S_i(%rip), %rsi
|
||
|
leaq .L__unnamed_1(%rip), %rcx
|
||
|
movl $4294967295, %r8d # imm = 0xFFFFFFFF
|
||
|
xorl %eax, %eax
|
||
|
movl %eax, %r9d
|
||
|
movq %rcx, %rdx
|
||
|
movq $0, (%rsp)
|
||
|
movq $0, 8(%rsp)
|
||
|
movq $0, 16(%rsp)
|
||
|
movq $0, 24(%rsp)
|
||
|
callq __cudaRegisterFunction@PLT
|
||
|
addq $40, %rsp
|
||
|
.cfi_def_cfa_offset 8
|
||
|
retq
|
||
|
.Lfunc_end8:
|
||
|
.size __cuda_register_globals, .Lfunc_end8-__cuda_register_globals
|
||
|
.cfi_endproc
|
||
|
# -- End function
|
||
|
.p2align 4, 0x90 # -- Begin function __cuda_module_ctor
|
||
|
.type __cuda_module_ctor,@function
|
||
|
__cuda_module_ctor: # @__cuda_module_ctor
|
||
|
.cfi_startproc
|
||
|
# %bb.0:
|
||
|
pushq %rax
|
||
|
.cfi_def_cfa_offset 16
|
||
|
leaq __cuda_fatbin_wrapper(%rip), %rdi
|
||
|
callq __cudaRegisterFatBinary@PLT
|
||
|
movq %rax, %rdi
|
||
|
movq %rdi, (%rsp) # 8-byte Spill
|
||
|
movq %rdi, __cuda_gpubin_handle(%rip)
|
||
|
callq __cuda_register_globals
|
||
|
movq (%rsp), %rdi # 8-byte Reload
|
||
|
callq __cudaRegisterFatBinaryEnd@PLT
|
||
|
leaq __cuda_module_dtor(%rip), %rdi
|
||
|
callq atexit@PLT
|
||
|
popq %rax
|
||
|
.cfi_def_cfa_offset 8
|
||
|
retq
|
||
|
.Lfunc_end9:
|
||
|
.size __cuda_module_ctor, .Lfunc_end9-__cuda_module_ctor
|
||
|
.cfi_endproc
|
||
|
# -- End function
|
||
|
.p2align 4, 0x90 # -- Begin function __cuda_module_dtor
|
||
|
.type __cuda_module_dtor,@function
|
||
|
__cuda_module_dtor: # @__cuda_module_dtor
|
||
|
.cfi_startproc
|
||
|
# %bb.0:
|
||
|
pushq %rax
|
||
|
.cfi_def_cfa_offset 16
|
||
|
movq __cuda_gpubin_handle(%rip), %rdi
|
||
|
callq __cudaUnregisterFatBinary@PLT
|
||
|
popq %rax
|
||
|
.cfi_def_cfa_offset 8
|
||
|
retq
|
||
|
.Lfunc_end10:
|
||
|
.size __cuda_module_dtor, .Lfunc_end10-__cuda_module_dtor
|
||
|
.cfi_endproc
|
||
|
# -- End function
|
||
|
.type .L.str,@object # @.str
|
||
|
.section .rodata.str1.1,"aMS",@progbits,1
|
||
|
.L.str:
|
||
|
.asciz "PASS\n"
|
||
|
.size .L.str, 6
|
||
|
|
||
|
.type .L.str.1,@object # @.str.1
|
||
|
.L.str.1:
|
||
|
.asciz "FAIL\n"
|
||
|
.size .L.str.1, 6
|
||
|
|
||
|
.type .L__unnamed_1,@object # @0
|
||
|
.L__unnamed_1:
|
||
|
.asciz "_Z6vecAddPdS_S_i"
|
||
|
.size .L__unnamed_1, 17
|
||
|
|
||
|
.type .L__unnamed_2,@object # @1
|
||
|
.section .nv_fatbin,"a",@progbits
|
||
|
.p2align 3
|
||
|
.L__unnamed_2:
|
||
|
.asciz "P\355U\272\001\000\020\000\330\024\000\000\000\000\000\000\002\000\001\001@\000\000\000@\021\000\000\000\000\000\000\000\000\000\000\000\000\000\000\007\000\001\0002\000\000\000\000\000\000\000\000\000\000\000\021\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\177ELF\002\001\0013\007\000\000\000\000\000\000\000\002\000\276\000u\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\300\016\000\000\000\000\000\0002\0052\000@\000\000\000\000\000@\000\n\000\001\000\000.shstrtab\000.strtab\000.symtab\000.symtab_shndx\000.nv.info\000.text._Z6vecAddPdS_S_i\000.nv.info._Z6vecAddPdS_S_i\000.nv.shared._Z6vecAddPdS_S_i\000.nv.global\000.nv.constant0._Z6vecAddPdS_S_i\000.nv.rel.action\000\000.shstrtab\000.strtab\000.symtab\000.symtab_shndx\000.nv.info\000_Z6vecAddPdS_S_i\000.text._Z6vecAddPdS_S_i\000.nv.info._Z6vecAddPdS_S_i\000.nv.shared._Z6vecAddPdS_S_i\000.nv.global\000blockIdx\000blockDim\000threadIdx\000.nv.constant0._Z6vecAddPdS_S_i\000_param\000.nv.rel.action\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000C\000\000\000\003\000\b\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\220\000\000\000\003\000\t\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\233\000\000\000\001\000\t\000\001\000\000\000\000\000\000\000\001\000\000\000\000\000\000\000\244\000\000\000\001\000\t\000\002\000\000\000\000\000\000\000\001\000\000\000\000\000\000\000\255\000\000\000\001\000\t\000\000\000\000\000\000\000\000\000\001\000\000\000\000\000\000\000\267\000\000\000\003\000\007\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\335\000\000\000\003\000\006\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\0002\000\000\000\022\020\b\000\000\000\000\000\000\000\000\000\000\t\000\000\000\000\000\000\004/\b\000\b\000\000\000\r\000\000\000\004#\b\000\b\000\000\000\000\000\000\000\004\022\b\000\b\000\000\000 \000\000\000\004\021\b\000\b\000\000\000 \000\000\000\0047\004\000u\000\000\000\0010\000\000\001*\000\000\004\n\b\000\006\000\000\000@\001\034\000\003\031\034\000\004\027\f\000\000\000\000\000\003\000\030\000\000\360\021\000\004\027\f\000\000\000\000\000\002\000\020\000\000\360!\000\004\027\f\000\000\000\000\000\001\000\b\000\000\360!\000\004\027\f\000\000\000\000\000\000\000\000\000\000\360!\000\003\033\377\000\004\035\004\000\350\003\000\000\004\034\004\000\270\b\000\000\004\036\004\000 \000\000\000\000\000\000\000K\000\000\000\000\000\000\000\000\002\002\b\020\n/\"\000\000\000\b\000\000\000\000\000\000\b\b\000\000\000\000\000\000\020\b\000\000\000\000\000\000\030\b\000\000\000\000\000\000 \b\000\000\000\000\000\000(\b\000\000\000\000\000\0000\b\000\000\000\000\000\0008\b\000\000\000\000\001\000\000\b\000\000\000\000\001\000\b\b\000\000\000\000\001\000\020\b\000\000\000\000\001\000\030\b\000\000\000\000\001\000 \b\000\000\000\000\001\000(\b\000\000\000\000\001\0000\b\000\000\000\000\001\0008\b\000\000\000\000\002\000\000\b\000\000\000\000\002\000\b\b\000\000\000\000\002\000\020\b\000\000\000\000\002\000\030\b\000\000\000\000\002\000 \b\000\000\000\000\002\000(\b\000\000\000\000\002\0000\b\000\000\000\000\002\0008\b\000\000\000\000\000\000\000\024,\000\000\000\t\000\000\f\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\
|
||
|
.size .L__unnamed_2, 5353
|
||
|
|
||
|
.type __cuda_fatbin_wrapper,@object # @__cuda_fatbin_wrapper
|
||
|
.section .nvFatBinSegment,"aw",@progbits
|
||
|
.p2align 3
|
||
|
__cuda_fatbin_wrapper:
|
||
|
.long 1180844977 # 0x466243b1
|
||
|
.long 1 # 0x1
|
||
|
.quad .L__unnamed_2
|
||
|
.quad 0
|
||
|
.size __cuda_fatbin_wrapper, 24
|
||
|
|
||
|
.type __cuda_gpubin_handle,@object # @__cuda_gpubin_handle
|
||
|
.local __cuda_gpubin_handle
|
||
|
.comm __cuda_gpubin_handle,8,8
|
||
|
.section .init_array,"aw",@init_array
|
||
|
.p2align 3
|
||
|
.quad __cuda_module_ctor
|
||
|
.ident "Ubuntu clang version 14.0.0-1ubuntu1.1"
|
||
|
.section ".note.GNU-stack","",@progbits
|
||
|
.addrsig
|
||
|
.addrsig_sym _Z21__device_stub__vecAddPdS_S_i
|
||
|
.addrsig_sym __cudaPopCallConfiguration
|
||
|
.addrsig_sym cudaLaunchKernel
|
||
|
.addrsig_sym malloc
|
||
|
.addrsig_sym _ZL10cudaMallocIdE9cudaErrorPPT_m
|
||
|
.addrsig_sym _ZSt3sinIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_
|
||
|
.addrsig_sym _ZSt3cosIiEN9__gnu_cxx11__enable_ifIXsr12__is_integerIT_EE7__valueEdE6__typeES2_
|
||
|
.addrsig_sym cudaMemcpy
|
||
|
.addrsig_sym _ZSt4ceilf
|
||
|
.addrsig_sym __cudaPushCallConfiguration
|
||
|
.addrsig_sym _ZSt3absd
|
||
|
.addrsig_sym printf
|
||
|
.addrsig_sym cudaFree
|
||
|
.addrsig_sym free
|
||
|
.addrsig_sym sin
|
||
|
.addrsig_sym cos
|
||
|
.addrsig_sym cudaMalloc
|
||
|
.addrsig_sym __cuda_register_globals
|
||
|
.addrsig_sym __cudaRegisterFunction
|
||
|
.addrsig_sym __cudaRegisterFatBinary
|
||
|
.addrsig_sym __cuda_module_ctor
|
||
|
.addrsig_sym __cudaRegisterFatBinaryEnd
|
||
|
.addrsig_sym __cudaUnregisterFatBinary
|
||
|
.addrsig_sym __cuda_module_dtor
|
||
|
.addrsig_sym atexit
|
||
|
.addrsig_sym .L__unnamed_2
|
||
|
.addrsig_sym __cuda_fatbin_wrapper
|
||
|
.addrsig_sym __cuda_gpubin_handle
|