272 lines
12 KiB
LLVM
272 lines
12 KiB
LLVM
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; ModuleID = 'nn_cuda-cuda-nvptx64-nvidia-cuda-sm_61.bc'
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source_filename = "nn_cuda.cu"
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target datalayout = "e-i64:64-i128:128-v16:16-v32:32-n16:32:64"
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target triple = "nvptx64-nvidia-cuda"
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%struct.__cuda_builtin_blockDim_t = type { i8 }
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%struct.__cuda_builtin_gridDim_t = type { i8 }
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%struct.__cuda_builtin_blockIdx_t = type { i8 }
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%struct.__cuda_builtin_threadIdx_t = type { i8 }
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%struct.cudaFuncAttributes = type { i64, i64, i64, i32, i32, i32, i32, i32, i32, i32 }
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%struct.latLong = type { float, float }
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$_ZN25__cuda_builtin_blockDim_t17__fetch_builtin_xEv = comdat any
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$_ZN24__cuda_builtin_gridDim_t17__fetch_builtin_xEv = comdat any
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$_ZN25__cuda_builtin_blockIdx_t17__fetch_builtin_yEv = comdat any
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$_ZN25__cuda_builtin_blockIdx_t17__fetch_builtin_xEv = comdat any
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$_ZN26__cuda_builtin_threadIdx_t17__fetch_builtin_xEv = comdat any
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@blockDim = extern_weak dso_local addrspace(1) global %struct.__cuda_builtin_blockDim_t, align 1
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@gridDim = extern_weak dso_local addrspace(1) global %struct.__cuda_builtin_gridDim_t, align 1
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@blockIdx = extern_weak dso_local addrspace(1) global %struct.__cuda_builtin_blockIdx_t, align 1
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@threadIdx = extern_weak dso_local addrspace(1) global %struct.__cuda_builtin_threadIdx_t, align 1
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; Function Attrs: convergent noinline nounwind optnone
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define weak dso_local i32 @cudaMalloc(i8** %p, i64 %s) #0 {
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entry:
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%p.addr = alloca i8**, align 8
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%s.addr = alloca i64, align 8
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store i8** %p, i8*** %p.addr, align 8
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store i64 %s, i64* %s.addr, align 8
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ret i32 999
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}
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; Function Attrs: convergent noinline nounwind optnone
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define weak dso_local i32 @cudaFuncGetAttributes(%struct.cudaFuncAttributes* %p, i8* %c) #0 {
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entry:
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%p.addr = alloca %struct.cudaFuncAttributes*, align 8
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%c.addr = alloca i8*, align 8
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store %struct.cudaFuncAttributes* %p, %struct.cudaFuncAttributes** %p.addr, align 8
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store i8* %c, i8** %c.addr, align 8
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ret i32 999
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}
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; Function Attrs: convergent noinline nounwind optnone
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define weak dso_local i32 @cudaDeviceGetAttribute(i32* %value, i32 %attr, i32 %device) #0 {
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entry:
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%value.addr = alloca i32*, align 8
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%attr.addr = alloca i32, align 4
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%device.addr = alloca i32, align 4
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store i32* %value, i32** %value.addr, align 8
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store i32 %attr, i32* %attr.addr, align 4
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store i32 %device, i32* %device.addr, align 4
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ret i32 999
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}
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; Function Attrs: convergent noinline nounwind optnone
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define weak dso_local i32 @cudaGetDevice(i32* %device) #0 {
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entry:
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%device.addr = alloca i32*, align 8
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store i32* %device, i32** %device.addr, align 8
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ret i32 999
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}
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; Function Attrs: convergent noinline nounwind optnone
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define weak dso_local i32 @cudaOccupancyMaxActiveBlocksPerMultiprocessor(i32* %numBlocks, i8* %func, i32 %blockSize, i64 %dynamicSmemSize) #0 {
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entry:
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%numBlocks.addr = alloca i32*, align 8
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%func.addr = alloca i8*, align 8
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%blockSize.addr = alloca i32, align 4
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%dynamicSmemSize.addr = alloca i64, align 8
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store i32* %numBlocks, i32** %numBlocks.addr, align 8
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store i8* %func, i8** %func.addr, align 8
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store i32 %blockSize, i32* %blockSize.addr, align 4
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store i64 %dynamicSmemSize, i64* %dynamicSmemSize.addr, align 8
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ret i32 999
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}
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; Function Attrs: convergent noinline nounwind optnone
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define weak dso_local i32 @cudaOccupancyMaxActiveBlocksPerMultiprocessorWithFlags(i32* %numBlocks, i8* %func, i32 %blockSize, i64 %dynamicSmemSize, i32 %flags) #0 {
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entry:
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%numBlocks.addr = alloca i32*, align 8
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%func.addr = alloca i8*, align 8
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%blockSize.addr = alloca i32, align 4
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%dynamicSmemSize.addr = alloca i64, align 8
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%flags.addr = alloca i32, align 4
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store i32* %numBlocks, i32** %numBlocks.addr, align 8
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store i8* %func, i8** %func.addr, align 8
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store i32 %blockSize, i32* %blockSize.addr, align 4
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store i64 %dynamicSmemSize, i64* %dynamicSmemSize.addr, align 8
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store i32 %flags, i32* %flags.addr, align 4
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ret i32 999
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}
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; Function Attrs: convergent noinline nounwind optnone
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define dso_local void @_Z6euclidP7latLongPfiff(%struct.latLong* %d_locations, float* %d_distances, i32 %numRecords, float %lat, float %lng) #0 {
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entry:
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%d_locations.addr = alloca %struct.latLong*, align 8
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%d_distances.addr = alloca float*, align 8
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%numRecords.addr = alloca i32, align 4
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%lat.addr = alloca float, align 4
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%lng.addr = alloca float, align 4
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%globalId = alloca i32, align 4
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%latLong = alloca %struct.latLong*, align 8
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%dist = alloca float*, align 8
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store %struct.latLong* %d_locations, %struct.latLong** %d_locations.addr, align 8
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store float* %d_distances, float** %d_distances.addr, align 8
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store i32 %numRecords, i32* %numRecords.addr, align 4
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store float %lat, float* %lat.addr, align 4
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store float %lng, float* %lng.addr, align 4
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%call = call i32 @_ZN25__cuda_builtin_blockDim_t17__fetch_builtin_xEv() #4
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%call1 = call i32 @_ZN24__cuda_builtin_gridDim_t17__fetch_builtin_xEv() #4
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%call2 = call i32 @_ZN25__cuda_builtin_blockIdx_t17__fetch_builtin_yEv() #4
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%mul = mul i32 %call1, %call2
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%call3 = call i32 @_ZN25__cuda_builtin_blockIdx_t17__fetch_builtin_xEv() #4
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%add = add i32 %mul, %call3
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%mul4 = mul i32 %call, %add
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%call5 = call i32 @_ZN26__cuda_builtin_threadIdx_t17__fetch_builtin_xEv() #4
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%add6 = add i32 %mul4, %call5
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store i32 %add6, i32* %globalId, align 4
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%0 = load %struct.latLong*, %struct.latLong** %d_locations.addr, align 8
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%1 = load i32, i32* %globalId, align 4
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%idx.ext = sext i32 %1 to i64
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%add.ptr = getelementptr inbounds %struct.latLong, %struct.latLong* %0, i64 %idx.ext
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store %struct.latLong* %add.ptr, %struct.latLong** %latLong, align 8
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%2 = load i32, i32* %globalId, align 4
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%3 = load i32, i32* %numRecords.addr, align 4
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%cmp = icmp slt i32 %2, %3
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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%4 = load float*, float** %d_distances.addr, align 8
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%5 = load i32, i32* %globalId, align 4
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%idx.ext7 = sext i32 %5 to i64
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%add.ptr8 = getelementptr inbounds float, float* %4, i64 %idx.ext7
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store float* %add.ptr8, float** %dist, align 8
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%6 = load float, float* %lat.addr, align 4
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%7 = load %struct.latLong*, %struct.latLong** %latLong, align 8
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%lat9 = getelementptr inbounds %struct.latLong, %struct.latLong* %7, i32 0, i32 0
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%8 = load float, float* %lat9, align 4
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%sub = fsub contract float %6, %8
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%9 = load float, float* %lat.addr, align 4
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%10 = load %struct.latLong*, %struct.latLong** %latLong, align 8
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%lat10 = getelementptr inbounds %struct.latLong, %struct.latLong* %10, i32 0, i32 0
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%11 = load float, float* %lat10, align 4
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%sub11 = fsub contract float %9, %11
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%mul12 = fmul contract float %sub, %sub11
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%12 = load float, float* %lng.addr, align 4
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%13 = load %struct.latLong*, %struct.latLong** %latLong, align 8
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%lng13 = getelementptr inbounds %struct.latLong, %struct.latLong* %13, i32 0, i32 1
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%14 = load float, float* %lng13, align 4
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%sub14 = fsub contract float %12, %14
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%15 = load float, float* %lng.addr, align 4
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%16 = load %struct.latLong*, %struct.latLong** %latLong, align 8
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%lng15 = getelementptr inbounds %struct.latLong, %struct.latLong* %16, i32 0, i32 1
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%17 = load float, float* %lng15, align 4
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%sub16 = fsub contract float %15, %17
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%mul17 = fmul contract float %sub14, %sub16
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%add18 = fadd contract float %mul12, %mul17
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%call19 = call float @_ZL4sqrtf(float %add18) #4
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%18 = load float*, float** %dist, align 8
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store float %call19, float* %18, align 4
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br label %if.end
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if.end: ; preds = %if.then, %entry
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ret void
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}
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; Function Attrs: alwaysinline convergent nounwind
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define linkonce_odr dso_local i32 @_ZN25__cuda_builtin_blockDim_t17__fetch_builtin_xEv() #1 comdat align 2 {
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entry:
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%0 = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
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ret i32 %0
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}
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; Function Attrs: alwaysinline convergent nounwind
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define linkonce_odr dso_local i32 @_ZN24__cuda_builtin_gridDim_t17__fetch_builtin_xEv() #1 comdat align 2 {
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entry:
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%0 = call i32 @llvm.nvvm.read.ptx.sreg.nctaid.x()
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ret i32 %0
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}
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; Function Attrs: alwaysinline convergent nounwind
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define linkonce_odr dso_local i32 @_ZN25__cuda_builtin_blockIdx_t17__fetch_builtin_yEv() #1 comdat align 2 {
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entry:
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%0 = call i32 @llvm.nvvm.read.ptx.sreg.ctaid.y()
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ret i32 %0
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}
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; Function Attrs: alwaysinline convergent nounwind
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define linkonce_odr dso_local i32 @_ZN25__cuda_builtin_blockIdx_t17__fetch_builtin_xEv() #1 comdat align 2 {
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entry:
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%0 = call i32 @llvm.nvvm.read.ptx.sreg.ctaid.x()
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ret i32 %0
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}
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; Function Attrs: alwaysinline convergent nounwind
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define linkonce_odr dso_local i32 @_ZN26__cuda_builtin_threadIdx_t17__fetch_builtin_xEv() #1 comdat align 2 {
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entry:
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%0 = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()
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ret i32 %0
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}
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; Function Attrs: alwaysinline convergent nounwind
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define internal float @_ZL4sqrtf(float %__x) #1 {
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entry:
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%__x.addr = alloca float, align 4
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store float %__x, float* %__x.addr, align 4
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%0 = load float, float* %__x.addr, align 4
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%call = call float @_ZL5sqrtff(float %0) #4
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ret float %call
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}
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; Function Attrs: nounwind readnone
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declare i32 @llvm.nvvm.read.ptx.sreg.ntid.x() #2
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; Function Attrs: nounwind readnone
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declare i32 @llvm.nvvm.read.ptx.sreg.nctaid.x() #2
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; Function Attrs: nounwind readnone
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declare i32 @llvm.nvvm.read.ptx.sreg.ctaid.y() #2
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; Function Attrs: nounwind readnone
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declare i32 @llvm.nvvm.read.ptx.sreg.ctaid.x() #2
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; Function Attrs: nounwind readnone
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declare i32 @llvm.nvvm.read.ptx.sreg.tid.x() #2
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; Function Attrs: alwaysinline convergent nounwind
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define internal float @_ZL5sqrtff(float %__a) #1 {
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entry:
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%__a.addr = alloca float, align 4
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store float %__a, float* %__a.addr, align 4
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%0 = load float, float* %__a.addr, align 4
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%call = call float @__nv_sqrtf(float %0) #4
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ret float %call
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}
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; Function Attrs: alwaysinline convergent inlinehint nounwind
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define internal float @__nv_sqrtf(float %x) #3 {
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%1 = call float @llvm.nvvm.sqrt.f(float %x)
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ret float %1
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}
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; Function Attrs: nounwind readnone
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declare float @llvm.nvvm.sqrt.f(float) #2
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attributes #0 = { convergent noinline nounwind optnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="sm_61" "target-features"="+ptx64,+sm_61" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #1 = { alwaysinline convergent nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="sm_61" "target-features"="+ptx64,+sm_61" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #2 = { nounwind readnone }
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attributes #3 = { alwaysinline convergent inlinehint nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #4 = { convergent nounwind }
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!llvm.module.flags = !{!0, !1, !2}
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!nvvm.annotations = !{!3, !4, !5, !4, !6, !6, !6, !6, !7, !7, !6}
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!llvm.ident = !{!8}
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!nvvmir.version = !{!9}
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!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 10, i32 1]}
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!1 = !{i32 1, !"wchar_size", i32 4}
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!2 = !{i32 4, !"nvvm-reflect-ftz", i32 0}
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!3 = !{void (%struct.latLong*, float*, i32, float, float)* @_Z6euclidP7latLongPfiff, !"kernel", i32 1}
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!4 = !{null, !"align", i32 8}
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!5 = !{null, !"align", i32 8, !"align", i32 65544, !"align", i32 131080}
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!6 = !{null, !"align", i32 16}
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!7 = !{null, !"align", i32 16, !"align", i32 65552, !"align", i32 131088}
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!8 = !{!"clang version 10.0.1 (https://github.com/llvm/llvm-project.git ef32c611aa214dea855364efd7ba451ec5ec3f74)"}
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!9 = !{i32 1, i32 4}
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