66 lines
1.9 KiB
C
66 lines
1.9 KiB
C
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#include "tb_cxxrtl_io.h"
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#include <stdint.h>
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volatile uint32_t scratch[2];
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#define test_assert(cond, ...) if (!(cond)) {tb_printf(__VA_ARGS__); return -1;}
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int main() {
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uint32_t load_result, success;
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tb_puts("Test 1: lr.w -> nop -> sc.w\n");
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scratch[0] = 0x1234;
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asm volatile (
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"lr.w %0, (%2)\n"
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"nop\n"
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"sc.w %1, %3, (%2)\n"
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: "=r" (load_result), "=r" (success)
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: "r" (&scratch[0]), "r" (0x5678)
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);
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test_assert(load_result == 0x1234, "Bad load result %08x\n", load_result);
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test_assert(scratch[0] == 0x5678, "Store didn't write memory\n");
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test_assert(success == 1, "Should report success\n");
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tb_puts("OK\n");
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tb_puts("Test 2: lr.w -> sc.w\n");
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scratch[0] = 0xabcd;
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asm volatile (
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"lr.w %0, (%2)\n"
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"sc.w %1, %3, (%2)\n"
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: "=r" (load_result), "=r" (success)
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: "r" (&scratch[0]), "r" (0xa5a5)
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);
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test_assert(load_result == 0xabcd, "Bad load result %08x\n", load_result);
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test_assert(scratch[0] == 0xa5a5, "Store didn't write memory\n");
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test_assert(success == 1, "Should report success\n");
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tb_puts("OK\n");
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tb_puts("Test 3: sc.w with no preceding lr.w\n");
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scratch[0] = 0x1234;
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asm volatile (
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"sc.w %0, %2, (%1)\n"
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: "=r" (success)
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: "r" (&scratch[0]), "r" (0x5678)
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);
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test_assert(scratch[0] == 0x1234, "Store shouldn't write memory\n");
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test_assert(success == 0, "Should report failure\n");
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tb_puts("OK\n");
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// Reservation is only cleared by other harts' stores.
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tb_puts("Test 4: lr.w -> sw -> sc.w\n");
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scratch[0] = 0x1234;
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scratch[1] = 0;
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asm volatile (
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"lr.w %0, (%2)\n"
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"sw %3, 4(%2)\n"
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"sc.w %1, %4, (%2)\n"
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: "=r" (load_result), "=r" (success)
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: "r" (&scratch[0]), "r" (0xabcd), "r" (0x5678)
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);
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test_assert(scratch[1] == 0xabcd, "Regular store should succeed\n");
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test_assert(scratch[0] == 0x5678, "sc didn't write memory\n");
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test_assert(success == 1, "Should report success\n");
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tb_puts("OK\n");
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return 0;
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}
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