Clean up tie-off of hardwired PMP registers
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6e80492723
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254350d300
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@ -68,8 +68,16 @@ always @ (posedge clk or negedge rst_n) begin: cfg_update
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end
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end
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end else if (cfg_wen) begin
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end else if (cfg_wen) begin
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for (i = 0; i < PMP_REGIONS; i = i + 1) begin
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for (i = 0; i < PMP_REGIONS; i = i + 1) begin
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if (!PMP_HARDWIRED[i]) begin
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if (cfg_addr == PMPCFG0 + i / 4 && !pmpcfg_l[i]) begin
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if (cfg_addr == PMPCFG0 + i / 4 && !pmpcfg_l[i]) begin
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if (PMP_HARDWIRED[i]) begin
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// Keep tied to hardwired value (but still make the "register" sensitive to clk)
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pmpcfg_l[i] <= PMP_HARDWIRED_CFG[8 * i + 7];
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pmpcfg_a[i] <= PMP_HARDWIRED_CFG[8 * i + 3 +: 2];
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pmpcfg_r[i] <= PMP_HARDWIRED_CFG[8 * i + 2];
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pmpcfg_w[i] <= PMP_HARDWIRED_CFG[8 * i + 1];
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pmpcfg_x[i] <= PMP_HARDWIRED_CFG[8 * i + 0];
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pmpaddr[i] <= PMP_HARDWIRED_ADDR[32 * i +: 30];
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end else begin
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pmpcfg_l[i] <= cfg_wdata[i % 4 * 8 + 7];
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pmpcfg_l[i] <= cfg_wdata[i % 4 * 8 + 7];
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pmpcfg_r[i] <= cfg_wdata[i % 4 * 8 + 2];
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pmpcfg_r[i] <= cfg_wdata[i % 4 * 8 + 2];
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pmpcfg_w[i] <= cfg_wdata[i % 4 * 8 + 1];
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pmpcfg_w[i] <= cfg_wdata[i % 4 * 8 + 1];
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