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Correct mnemonic when logging unsigned sltiu instruction

This commit is contained in:
Richard-Gordon 2021-10-08 09:45:51 +01:00 committed by Luke Wren
parent cfe16caf41
commit 375a6d60b7
1 changed files with 2 additions and 2 deletions
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4
test/sim/rvpy/rvpy
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@ -120,7 +120,7 @@ class RVCSR:
WRITE = 0 WRITE = 0
WRITE_SET = 1 WRITE_SET = 1
WRITE_CLEAR = 2 WRITE_CLEAR = 2
MSCRATCH = 0x340 MSCRATCH = 0x340
MCYCLE = 0xb00 MCYCLE = 0xb00
@ -265,7 +265,7 @@ class RVCore:
if log: log_disasm = f"slti x{regnum_rd}, x{regnum_rs1}, {imm}" if log: log_disasm = f"slti x{regnum_rd}, x{regnum_rs1}, {imm}"
rd_wdata = 1 * (rs1 < imm) rd_wdata = 1 * (rs1 < imm)
elif funct3 == 0b011: elif funct3 == 0b011:
if log: log_disasm = f"slti x{regnum_rd}, x{regnum_rs1}, {imm & XLEN_MASK}" if log: log_disasm = f"sltiu x{regnum_rd}, x{regnum_rs1}, {imm & XLEN_MASK}"
rd_wdata = 1 * (rs1 & XLEN_MASK < imm & XLEN_MASK) rd_wdata = 1 * (rs1 & XLEN_MASK < imm & XLEN_MASK)
elif funct3 == 0b100: elif funct3 == 0b100:
if log: log_disasm = f"xori x{regnum_rd}, x{regnum_rs1}, 0x{imm & XLEN_MASK:x}" if log: log_disasm = f"xori x{regnum_rd}, x{regnum_rs1}, 0x{imm & XLEN_MASK:x}"