From 50d3d5d3b3a5a8407d145376e8f464e4cb46ce7f Mon Sep 17 00:00:00 2001 From: Luke Wren Date: Mon, 6 Dec 2021 19:27:20 +0000 Subject: [PATCH] Maintain AMO IRQ holdoff when transitioning from data phase to error phase, to prevent error possibly being flushed --- hdl/hazard3_core.v | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/hdl/hazard3_core.v b/hdl/hazard3_core.v index 9f854c0..8ad6fa2 100644 --- a/hdl/hazard3_core.v +++ b/hdl/hazard3_core.v @@ -606,8 +606,13 @@ always @ (posedge clk or negedge rst_n) begin // taken once this load/store moves to the next stage: if another load/store // is chasing down the pipeline then this is immediately suppressed by the // IRQ entry, before its address phase can begin. + + // Also hold off on AMOs, unless the AMO is transitioning to an address + // phase or completing. (This excludes transitions to error phase.) + xm_delay_irq_entry <= bus_aph_req_d && !bus_aph_ready_d || - d_memop_is_amo && !((x_amo_phase == 3'h1 || x_amo_phase == 3'h3) && bus_dph_ready_d); + d_memop_is_amo && !((x_amo_phase == 3'h1 || x_amo_phase == 3'h3) && bus_dph_ready_d && !bus_dph_err_d); + if (!x_stall) prev_instr_was_32_bit <= df_cir_use == 2'd2; end