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Remove wrong/useless mxr logic in PMP

This commit is contained in:
Luke Wren 2022-08-08 18:45:37 +01:00
parent 5894ddf15c
commit 5819f8eb7e
2 changed files with 1 additions and 7 deletions
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2
hdl/hazard3_core.v
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@ -784,8 +784,6 @@ if (PMP_REGIONS > 0) begin: have_pmp
.clk (clk), .clk (clk),
.rst_n (rst_n), .rst_n (rst_n),
.mstatus_mxr (1'b0), // Only used when S mode present
.cfg_addr (x_pmp_cfg_addr), .cfg_addr (x_pmp_cfg_addr),
.cfg_wen (x_pmp_cfg_wen), .cfg_wen (x_pmp_cfg_wen),
.cfg_wdata (x_pmp_cfg_wdata), .cfg_wdata (x_pmp_cfg_wdata),

6
hdl/hazard3_pmp.v
View File

@ -12,7 +12,6 @@ module hazard3_pmp #(
) ( ) (
input wire clk, input wire clk,
input wire rst_n, input wire rst_n,
input wire mstatus_mxr, // make executable readable
// Config interface passed through CSR block // Config interface passed through CSR block
input wire [11:0] cfg_addr, input wire [11:0] cfg_addr,
@ -190,7 +189,6 @@ reg d_m; // Hazard3 extension (M-mode without locking)
reg d_l; reg d_l;
reg d_r; reg d_r;
reg d_w; reg d_w;
reg d_x; // needed because of MXR
always @ (*) begin: check_d_match always @ (*) begin: check_d_match
integer i; integer i;
@ -199,7 +197,6 @@ always @ (*) begin: check_d_match
d_l = 1'b0; d_l = 1'b0;
d_r = 1'b0; d_r = 1'b0;
d_w = 1'b0; d_w = 1'b0;
d_x = 1'b0;
// Lowest-numbered match wins, so work down from the top. This should be // Lowest-numbered match wins, so work down from the top. This should be
// inferred as a priority mux structure (cascade mux). // inferred as a priority mux structure (cascade mux).
for (i = PMP_REGIONS - 1; i >= 0; i = i - 1) begin for (i = PMP_REGIONS - 1; i >= 0; i = i - 1) begin
@ -209,7 +206,6 @@ always @ (*) begin: check_d_match
d_l = pmpcfg_l[i]; d_l = pmpcfg_l[i];
d_r = pmpcfg_r[i]; d_r = pmpcfg_r[i];
d_w = pmpcfg_w[i]; d_w = pmpcfg_w[i];
d_x = pmpcfg_x[i];
end end
end end
end end
@ -279,7 +275,7 @@ end
// M-mode gets to ignore protections, unless the lock bit is set. // M-mode gets to ignore protections, unless the lock bit is set.
assign d_kill = (!d_m_mode || d_l || d_m) && ( assign d_kill = (!d_m_mode || d_l || d_m) && (
(!d_write && !(d_r || (d_x && mstatus_mxr))) || (!d_write && !d_r) ||
( d_write && !d_w) ( d_write && !d_w)
); );