diff --git a/hdl/hazard3_core.v b/hdl/hazard3_core.v
index fb59af7..e2a1046 100644
--- a/hdl/hazard3_core.v
+++ b/hdl/hazard3_core.v
@@ -383,7 +383,7 @@ hazard3_csr #(
 	.trap_addr               (x_trap_addr),
 	.trap_enter_vld          (x_trap_enter),
 	.trap_enter_rdy          (x_trap_enter_rdy),
-	.trap_exit               (x_trap_exit),
+	.trap_exit               (x_trap_exit && !x_stall),
 	.trap_is_exception       (x_trap_is_exception),
 	.mepc_in                 (d_pc),
 	.mepc_out                (x_mepc),
diff --git a/hdl/hazard3_decode.v b/hdl/hazard3_decode.v
index 8eb7e83..d32916f 100644
--- a/hdl/hazard3_decode.v
+++ b/hdl/hazard3_decode.v
@@ -262,6 +262,7 @@ always @ (*) begin
 		d_branchcond = BCOND_NEVER;
 		d_csr_ren    = 1'b0;
 		d_csr_wen    = 1'b0;
+		d_except     = EXCEPT_NONE;
 		if (EXTENSION_M)
 			d_aluop = ALUOP_ADD;
 
diff --git a/hdl/hazard3_rvfi_monitor.vh b/hdl/hazard3_rvfi_monitor.vh
index 4318808..235fb71 100644
--- a/hdl/hazard3_rvfi_monitor.vh
+++ b/hdl/hazard3_rvfi_monitor.vh
@@ -8,11 +8,6 @@
 //
 // All modelling signals prefixed with rvfm (riscv-formal monitor)
 
-// FIXME!!!!!
-always assume(!(x_trap_enter || x_trap_exit));
-
-
-
 // ----------------------------------------------------------------------------
 // Instruction monitor