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Oops, properly fix platform IRQ mcause numbers

This commit is contained in:
Luke Wren 2021-07-19 09:32:59 +01:00
parent 65fb62901e
commit 7d24f42da9
1 changed files with 9 additions and 8 deletions
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15
hdl/hazard3_csr.v
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@ -999,14 +999,16 @@ hazard3_priority_encode #(
// depending on dcsr.ebreakm.
wire exception_req_any = except != EXCEPT_NONE && !(except == EXCEPT_EBREAK && dcsr_ebreakm);
// Note when eivect=0 external interrupts also count as standard interrupts,
// so the standard mapping (collapsed into a single vector) always takes
// priority.
wire [5:0] vector_sel =
exception_req_any || !irq_vector_enable ? 6'd0 :
// Note when eivect=0 platform external interrupts also count as a standard
// external interrupt, so the standard mapping (collapsed into a single
// vector) always takes priority.
wire [5:0] mcause_irq_num =
standard_irq_active ? {2'h0, standard_irq_num} :
external_irq_active ? {1'h0, external_irq_num} + 6'd16 : 6'd0;
wire [5:0] vector_sel =
!exception_req_any && irq_vector_enable ? mcause_irq_num : 6'd0;
assign trap_addr =
except == EXCEPT_MRET ? mepc :
pending_dbg_resume ? dpc : mtvec | {24'h0, vector_sel, 2'h0};
@ -1022,8 +1024,7 @@ assign trap_enter_vld =
DEBUG_SUPPORT && (want_halt_irq || want_halt_except || pending_dbg_resume);
assign mcause_irq_next = !exception_req_any;
assign mcause_code_next = exception_req_any ? {2'h0, except} :
standard_irq_active ? standard_irq_num : external_irq_num;
assign mcause_code_next = exception_req_any ? {2'h0, except} : mcause_irq_num;
// ----------------------------------------------------------------------------