colin
/
Hazard3
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Fix transposition of RWX <-> XWR in PMP implementation. 

None of upstream tests used for Hazard3 seem to cover X != R. The
Hazard3 tests covered this case, but the header file for the tests has
the same mistake. Fix the header.
This commit is contained in:
Luke Wren 2024-04-27 13:51:52 +01:00
parent fce1c087d4
commit 7d370292b0
2 changed files with 13 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
hdl/hazard3_pmp.v
View File

@ -57,9 +57,9 @@ end else begin: have_pmp
reg pmpcfg_l [0:PMP_REGIONS-1]; reg pmpcfg_l [0:PMP_REGIONS-1];
reg [1:0] pmpcfg_a [0:PMP_REGIONS-1]; reg [1:0] pmpcfg_a [0:PMP_REGIONS-1];
reg pmpcfg_r [0:PMP_REGIONS-1];
reg pmpcfg_w [0:PMP_REGIONS-1];
reg pmpcfg_x [0:PMP_REGIONS-1]; reg pmpcfg_x [0:PMP_REGIONS-1];
reg pmpcfg_w [0:PMP_REGIONS-1];
reg pmpcfg_r [0:PMP_REGIONS-1];
// Address register contains bits 33:2 of the address (to support 16 GiB // Address register contains bits 33:2 of the address (to support 16 GiB
// physical address space). We don't implement bits 33 or 32. // physical address space). We don't implement bits 33 or 32.
@ -77,9 +77,9 @@ always @ (posedge clk or negedge rst_n) begin: cfg_update
for (i = 0; i < PMP_REGIONS; i = i + 1) begin for (i = 0; i < PMP_REGIONS; i = i + 1) begin
pmpcfg_l[i] <= PMP_HARDWIRED[i] ? PMP_HARDWIRED_CFG[8 * i + 7] : 1'b0; pmpcfg_l[i] <= PMP_HARDWIRED[i] ? PMP_HARDWIRED_CFG[8 * i + 7] : 1'b0;
pmpcfg_a[i] <= PMP_HARDWIRED[i] ? PMP_HARDWIRED_CFG[8 * i + 3 +: 2] : 2'h0; pmpcfg_a[i] <= PMP_HARDWIRED[i] ? PMP_HARDWIRED_CFG[8 * i + 3 +: 2] : 2'h0;
pmpcfg_r[i] <= PMP_HARDWIRED[i] ? PMP_HARDWIRED_CFG[8 * i + 2] : 1'b0; pmpcfg_x[i] <= PMP_HARDWIRED[i] ? PMP_HARDWIRED_CFG[8 * i + 2] : 1'b0;
pmpcfg_w[i] <= PMP_HARDWIRED[i] ? PMP_HARDWIRED_CFG[8 * i + 1] : 1'b0; pmpcfg_w[i] <= PMP_HARDWIRED[i] ? PMP_HARDWIRED_CFG[8 * i + 1] : 1'b0;
pmpcfg_x[i] <= PMP_HARDWIRED[i] ? PMP_HARDWIRED_CFG[8 * i + 0] : 1'b0; pmpcfg_r[i] <= PMP_HARDWIRED[i] ? PMP_HARDWIRED_CFG[8 * i + 0] : 1'b0;
pmpaddr[i] <= PMP_HARDWIRED[i] ? PMP_HARDWIRED_ADDR[32 * i +: 30] : pmpaddr[i] <= PMP_HARDWIRED[i] ? PMP_HARDWIRED_ADDR[32 * i +: 30] :
PMP_GRAIN > 1 ? ~(~30'h0 << (PMP_GRAIN - 1)) : 30'h0; PMP_GRAIN > 1 ? ~(~30'h0 << (PMP_GRAIN - 1)) : 30'h0;
@ -92,15 +92,15 @@ always @ (posedge clk or negedge rst_n) begin: cfg_update
// Keep tied to hardwired value (but still make the "register" sensitive to clk) // Keep tied to hardwired value (but still make the "register" sensitive to clk)
pmpcfg_l[i] <= PMP_HARDWIRED_CFG[8 * i + 7]; pmpcfg_l[i] <= PMP_HARDWIRED_CFG[8 * i + 7];
pmpcfg_a[i] <= PMP_HARDWIRED_CFG[8 * i + 3 +: 2]; pmpcfg_a[i] <= PMP_HARDWIRED_CFG[8 * i + 3 +: 2];
pmpcfg_r[i] <= PMP_HARDWIRED_CFG[8 * i + 2]; pmpcfg_x[i] <= PMP_HARDWIRED_CFG[8 * i + 2];
pmpcfg_w[i] <= PMP_HARDWIRED_CFG[8 * i + 1]; pmpcfg_w[i] <= PMP_HARDWIRED_CFG[8 * i + 1];
pmpcfg_x[i] <= PMP_HARDWIRED_CFG[8 * i + 0]; pmpcfg_r[i] <= PMP_HARDWIRED_CFG[8 * i + 0];
pmpaddr[i] <= PMP_HARDWIRED_ADDR[32 * i +: 30]; pmpaddr[i] <= PMP_HARDWIRED_ADDR[32 * i +: 30];
end else begin end else begin
pmpcfg_l[i] <= cfg_wdata[i % 4 * 8 + 7]; pmpcfg_l[i] <= cfg_wdata[i % 4 * 8 + 7];
pmpcfg_r[i] <= cfg_wdata[i % 4 * 8 + 2]; pmpcfg_x[i] <= cfg_wdata[i % 4 * 8 + 2];
pmpcfg_w[i] <= cfg_wdata[i % 4 * 8 + 1]; pmpcfg_w[i] <= cfg_wdata[i % 4 * 8 + 1];
pmpcfg_x[i] <= cfg_wdata[i % 4 * 8 + 0]; pmpcfg_r[i] <= cfg_wdata[i % 4 * 8 + 0];
// Unsupported A values are mapped to OFF (it's a WARL field). // Unsupported A values are mapped to OFF (it's a WARL field).
pmpcfg_a[i] <= pmpcfg_a[i] <=
cfg_wdata[i % 4 * 8 + 3 +: 2] == PMP_A_TOR ? PMP_A_OFF : cfg_wdata[i % 4 * 8 + 3 +: 2] == PMP_A_TOR ? PMP_A_OFF :
@ -132,9 +132,9 @@ always @ (*) begin: cfg_read
pmpcfg_l[i], pmpcfg_l[i],
2'b00, 2'b00,
pmpcfg_a[i], pmpcfg_a[i],
pmpcfg_r[i], pmpcfg_x[i],
pmpcfg_w[i], pmpcfg_w[i],
pmpcfg_x[i] pmpcfg_r[i]
}; };
end else if (cfg_addr == PMPADDR0 + i) begin end else if (cfg_addr == PMPADDR0 + i) begin
// If G > 1, the G-1 LSBs of pmpaddr_i are read-only-zero when // If G > 1, the G-1 LSBs of pmpaddr_i are read-only-zero when

4
test/sim/sw_testcases/include/pmp.h
View File

@ -7,9 +7,9 @@
#define PMPCFG_L_BITS 0x80 #define PMPCFG_L_BITS 0x80
#define PMPCFG_A_LSB 3 #define PMPCFG_A_LSB 3
#define PMPCFG_A_BITS 0x18 #define PMPCFG_A_BITS 0x18
#define PMPCFG_R_BITS 0x04 #define PMPCFG_R_BITS 0x01
#define PMPCFG_W_BITS 0x02 #define PMPCFG_W_BITS 0x02
#define PMPCFG_X_BITS 0x01 #define PMPCFG_X_BITS 0x04
#define PMPCFG_A_OFF 0x0 #define PMPCFG_A_OFF 0x0
#define PMPCFG_A_TOR 0x1 #define PMPCFG_A_TOR 0x1