diff --git a/Readme.md b/Readme.md
index 345ef2f..b494da6 100644
--- a/Readme.md
+++ b/Readme.md
@@ -11,7 +11,7 @@ Hazard3 is a 3-stage RISC-V processor, implementing the `RV32I` instruction set
 * `Zbc`: carry-less multiplication
 * `Zbs`: single-bit manipulation
 * `Zbkb`: basic bit manipulation for scalar cryptography
-* `Zcb`: basic additional compressed instructions *(experimental)*
+* `Zcb`: basic additional compressed instructions
 * Debug, Machine and User privilege/execution modes
 * Privileged instructions `ECALL`, `EBREAK`, `MRET` and `WFI`
 * Physical memory protection (PMP) with up to 16 naturally aligned regions
diff --git a/hdl/hazard3_instr_decompress.v b/hdl/hazard3_instr_decompress.v
index e633258..ae3d27c 100644
--- a/hdl/hazard3_instr_decompress.v
+++ b/hdl/hazard3_instr_decompress.v
@@ -155,23 +155,23 @@ end else begin: instr_decompress
 
 			// Optional Zbc instructions:
 			`RVOPC_C_LBU: begin
-				instr_out = `RVOPC_NOZ_LBU    | rfmt_rd(rd_s) | rfmt_rs1(rs1_s) | imm_c_lb;
+				instr_out = `RVOPC_NOZ_LBU    | rfmt_rd(rd_s)  | rfmt_rs1(rs1_s) | imm_c_lb;
 				invalid = ~|EXTENSION_ZCB;
 			end
 			`RVOPC_C_LHU: begin
-				instr_out = `RVOPC_NOZ_LHU    | rfmt_rd(rd_s) | rfmt_rs1(rs1_s) | imm_c_lh;
+				instr_out = `RVOPC_NOZ_LHU    | rfmt_rd(rd_s)  | rfmt_rs1(rs1_s) | imm_c_lh;
 				invalid = ~|EXTENSION_ZCB;
 			end
 			`RVOPC_C_LH: begin
-				instr_out = `RVOPC_NOZ_LH     | rfmt_rd(rd_s) | rfmt_rs1(rs1_s) | imm_c_lh;
+				instr_out = `RVOPC_NOZ_LH     | rfmt_rd(rd_s)  | rfmt_rs1(rs1_s) | imm_c_lh;
 				invalid = ~|EXTENSION_ZCB;
 			end
 			`RVOPC_C_SB: begin
-				instr_out = `RVOPC_NOZ_SB     | rfmt_rd(rd_s) | rfmt_rs1(rs1_s) | imm_c_lb;
+				instr_out = `RVOPC_NOZ_SB     | rfmt_rs2(rd_s) | rfmt_rs1(rs1_s) | imm_c_lb >> 13;
 				invalid = ~|EXTENSION_ZCB;
 			end
 			`RVOPC_C_SH: begin
-				instr_out = `RVOPC_NOZ_SH     | rfmt_rd(rd_s) | rfmt_rs1(rs1_s) | imm_c_lh;
+				instr_out = `RVOPC_NOZ_SH     | rfmt_rs2(rd_s) | rfmt_rs1(rs1_s) | imm_c_lh >> 13;
 				invalid = ~|EXTENSION_ZCB;
 			end
 			`RVOPC_C_ZEXT_B: begin