diff --git a/hdl/hazard3_csr.v b/hdl/hazard3_csr.v
index 27c93e9..2947c8b 100644
--- a/hdl/hazard3_csr.v
+++ b/hdl/hazard3_csr.v
@@ -478,7 +478,9 @@ always @ (*) begin
 
 			2'd0,              // Z, Y, no
 			|CSR_M_TRAP,       // X is set for our non-standard interrupt enable CSRs
-			10'd0,             // W...N, no
+			2'd0,              // V, W, no
+			|U_MODE,
+			7'd0,              // T...N, no
 			|EXTENSION_M,
 			3'd0,              // L...J, no
 			1'b1,              // Integer ISA
diff --git a/test/sim/riscv-tests/riscv-tests b/test/sim/riscv-tests/riscv-tests
index 8be7e43..6fc7268 160000
--- a/test/sim/riscv-tests/riscv-tests
+++ b/test/sim/riscv-tests/riscv-tests
@@ -1 +1 @@
-Subproject commit 8be7e4362db52942cc9711c3af01937b39646c02
+Subproject commit 6fc7268b2cefe47616e692de665b6141c3050c9d