Enable -Wextra for rvcpp

test/sim/rvcpp/Makefile

@@ -5,7 +5,7 @@ EXECUTABLE:=rvcpp
 .PHONY: all clean tb
 
 all:
-	g++ -std=c++17 -O3 -Wall -I include $(SRCS) -o $(EXECUTABLE)
+	g++ -std=c++17 -O3 -Wall -Wextra -I include $(SRCS) -o $(EXECUTABLE)
 
 # To match tb_cxxrtl/Makefile:
 tb: all

test/sim/rvcpp/rv_core.cpp

@@ -108,16 +108,27 @@ static inline uint32_t zcmp_reg_mask(uint32_t instr) {
 	switch (zcmp_n_regs(instr)) {
 		case 13: mask |= 1u << 27; // s11
 		         mask |= 1u << 26; // s10
+		         // fall through
 		case 11: mask |= 1u << 25; // s9
+		         // fall through
 		case 10: mask |= 1u << 24; // s8
+		         // fall through
 		case  9: mask |= 1u << 23; // s7
+		         // fall through
 		case  8: mask |= 1u << 22; // s6
+		         // fall through
 		case  7: mask |= 1u << 21; // s5
+		         // fall through
 		case  6: mask |= 1u << 20; // s4
+		         // fall through
 		case  5: mask |= 1u << 19; // s3
+		         // fall through
 		case  4: mask |= 1u << 18; // s2
+		         // fall through
 		case  3: mask |= 1u <<  9; // s1
+		         // fall through
 		case  2: mask |= 1u <<  8; // s0
+		         // fall through
 		case  1: mask |= 1u <<  1; // ra
 	}
 	return mask;

test/sim/rvcpp/rv_csr.cpp

@@ -79,6 +79,7 @@ void RVCSR::step() {
 
 // Returns None on permission/decode fail
 std::optional<ux_t> RVCSR::read(uint16_t addr, bool side_effect) {
+	(void)side_effect;
 	if (addr >= 1u << 12 || GETBITS(addr, 9, 8) > priv)
 		return {};