Fix mstatus.mie still being respected when privilege is less than M.
Extend umode_wfi testcase to cover this, and in particular to check that when entering U-mode with IRQs pending, the IRQs execute before any exceptions occurring as a result of the U-mode instructions.
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@ -1268,7 +1268,7 @@ assign mip = {
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3'h0 // Reserved
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};
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wire irq_active = |(mip & mie) && mstatus_mie && !dcsr_step;
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wire irq_active = |(mip & mie) && (mstatus_mie || !m_mode) && !dcsr_step;
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// WFI clear respects individual interrupt enables but ignores mstatus.mie.
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// Additionally, wfi is treated as a nop during single-stepping and D-mode.
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@ -18,6 +18,8 @@ Do WFI with TW=1, IRQs disabled:
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mcause = 2 // = illegal instruction
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Do PMP-failed WFI, IRQs disabled:
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mcause = 1 // = instruction access fault.
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Do PMP-failed WFI, IRQs enabled:
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mcause = 1 // = instruction access fault.
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*******************************************************************************/
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@ -37,25 +39,42 @@ void __attribute__((naked)) do_ecall() {
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// Call function in U mode, from M mode. Catch exception, or break back to M
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// mode if the function returned normally (via dummy ecall), and then return.
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static inline void umode_call_and_catch(void (*f)(void)) {
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clear_csr(mstatus, 0x1800u);
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write_csr(mepc, f);
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uint32_t mtvec_save = read_csr(mtvec);
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asm (
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" la ra, 1f\n"
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" csrw mtvec, ra\n"
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static void __attribute__((naked)) umode_call_and_catch(void (*f)(void)) {
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(void)f;
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asm volatile (
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// Set up return-from-M-mode to U-mode at *f
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" csrw mepc, a0\n"
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" li a0, 0x1800\n"
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" csrc mstatus, a0\n"
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// Save ra, we will pick it up in handle_exception()
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" addi sp, sp, -16\n"
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" sw ra, (sp)\n"
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// Set up return to ecall if there is no other exception
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" la ra, do_ecall\n"
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// Enter function pointer
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" mret\n"
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// Note mtvec requires 4-byte alignment.
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".p2align 2\n"
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"1:\n"
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: : : "ra"
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);
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write_csr(mtvec, mtvec_save);
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}
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void __attribute__((naked)) handle_exception(void) {
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asm volatile (
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// Pick up saved ra and return through it -- from the caller's pov we
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// have returned from umode_call_and_catch()
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" lw ra, (sp)\n"
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" addi sp, sp, 16\n"
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" ret\n"
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);
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}
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volatile bool timer_has_fired = false;
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void __attribute__((interrupt)) isr_machine_timer(void) {
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timer_has_fired = true;
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mm_timer->mtimecmp = mm_timer->mtime + 100;
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}
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int main() {
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// Ensure WFI doesn't block by enabling timer IRQ but leaving IRQs globally disabled.
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// (They will still fire in U-mode, as mstatus.mie is treated as set when priv < M)
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set_csr(mie, -1u);
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// Give U mode RWX permission on all of memory.
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@ -63,7 +82,9 @@ int main() {
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write_csr(pmpaddr0, -1u);
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tb_puts("Do WFI with TW=0:\n");
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tb_assert(!timer_has_fired, "Timer should not have fired whilst still in M-mode\n");
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umode_call_and_catch(&do_wfi);
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tb_assert(timer_has_fired, "Timer should have fired upon entering U-mode\n");
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tb_printf("mcause = %u\n", read_csr(mcause));
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if (read_csr(mepc) != (uint32_t)&do_ecall) {
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tb_puts("Non-normal return detected\n");
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@ -82,7 +103,9 @@ int main() {
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write_csr(mie, 0);
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// This checks that setting TW stops the WFI state from being entered, as
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// well as just raising an exception.
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timer_has_fired = false;
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umode_call_and_catch(&do_wfi);
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tb_assert(!timer_has_fired, "Even in U-mode, timer should not fire when disabled.\n");
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tb_printf("mcause = %u\n", read_csr(mcause));
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tb_assert(read_csr(mepc) == (uint32_t)&do_wfi, "mepc doesn't point to wfi\n");
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@ -97,5 +120,15 @@ int main() {
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tb_printf("mcause = %u\n", read_csr(mcause));
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tb_assert(read_csr(mepc) == (uint32_t)&do_wfi, "mepc doesn't point to wfi\n");
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tb_puts("Do PMP-failed WFI, IRQs enabled:\n");
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// The expected sequence here is: return to U-mode, enter timer IRQ in
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// M-mode, return to U-mode again, take PMP fault back to M-mode.
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set_csr(mie, -1u);
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timer_has_fired = false;
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umode_call_and_catch(&do_wfi);
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tb_assert(timer_has_fired, "Timer should fire immediately on U-mode entry\n");
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tb_printf("mcause = %u\n", read_csr(mcause));
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tb_assert(read_csr(mepc) == (uint32_t)&do_wfi, "mepc doesn't point to wfi\n");
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return 0;
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}
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