Fix hookup of uop_atomic signal
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@ -12,6 +12,7 @@ Hazard3 is a 3-stage RISC-V processor, implementing the `RV32I` instruction set
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* `Zbs`: single-bit manipulation
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* `Zbkb`: basic bit manipulation for scalar cryptography
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* `Zcb`: basic additional compressed instructions
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* `Zcmp`: push/pop instructions *(experimental)*
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* Debug, Machine and User privilege/execution modes
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* Privileged instructions `ECALL`, `EBREAK`, `MRET` and `WFI`
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* Physical memory protection (PMP) with up to 16 naturally aligned regions
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@ -79,7 +79,7 @@ reg d_invalid_32bit;
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wire d_invalid = d_invalid_16bit || d_invalid_32bit;
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wire uop_nonfinal;
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wire uop_uninterruptible;
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wire uop_atomic;
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wire uop_stall;
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wire uop_clear;
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@ -93,7 +93,7 @@ hazard3_instr_decompress #(
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.instr_is_32bit (d_instr_is_32bit),
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.instr_out (d_instr),
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.instr_out_uop_nonfinal (uop_nonfinal),
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.instr_out_uop_uninterruptible (uop_uninterruptible),
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.instr_out_uop_atomic (uop_atomic),
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.instr_out_uop_stall (uop_stall),
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.instr_out_uop_clear (uop_clear),
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@ -102,7 +102,7 @@ hazard3_instr_decompress #(
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.invalid (d_invalid_16bit)
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);
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assign d_uninterruptible = uop_uninterruptible && !d_invalid;
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assign d_uninterruptible = uop_atomic && !d_invalid;
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assign d_no_pc_increment = uop_nonfinal && !d_invalid;
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assign uop_stall = x_stall || d_starved;
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assign uop_clear = f_jump_now;
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@ -427,7 +427,7 @@ if (EXTENSION_ZCMP) begin: have_uop_ctr;
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`ifdef HAZARD3_ASSERTIONS
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assert(uop_ctr == 4'h0 || in_uop_seq);
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if (uop_seq_end) begin
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assert(in_uop_seq));
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assert(in_uop_seq);
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assert(instr_out_uop_stall || uop_ctr_nxt == 4'h0);
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end
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`endif
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