Fix hookup of uop_atomic signal
This commit is contained in:
parent
3b2ddee06b
commit
c4e0c15160
|
@ -12,6 +12,7 @@ Hazard3 is a 3-stage RISC-V processor, implementing the `RV32I` instruction set
|
||||||
* `Zbs`: single-bit manipulation
|
* `Zbs`: single-bit manipulation
|
||||||
* `Zbkb`: basic bit manipulation for scalar cryptography
|
* `Zbkb`: basic bit manipulation for scalar cryptography
|
||||||
* `Zcb`: basic additional compressed instructions
|
* `Zcb`: basic additional compressed instructions
|
||||||
|
* `Zcmp`: push/pop instructions *(experimental)*
|
||||||
* Debug, Machine and User privilege/execution modes
|
* Debug, Machine and User privilege/execution modes
|
||||||
* Privileged instructions `ECALL`, `EBREAK`, `MRET` and `WFI`
|
* Privileged instructions `ECALL`, `EBREAK`, `MRET` and `WFI`
|
||||||
* Physical memory protection (PMP) with up to 16 naturally aligned regions
|
* Physical memory protection (PMP) with up to 16 naturally aligned regions
|
||||||
|
|
|
@ -79,7 +79,7 @@ reg d_invalid_32bit;
|
||||||
wire d_invalid = d_invalid_16bit || d_invalid_32bit;
|
wire d_invalid = d_invalid_16bit || d_invalid_32bit;
|
||||||
|
|
||||||
wire uop_nonfinal;
|
wire uop_nonfinal;
|
||||||
wire uop_uninterruptible;
|
wire uop_atomic;
|
||||||
wire uop_stall;
|
wire uop_stall;
|
||||||
wire uop_clear;
|
wire uop_clear;
|
||||||
|
|
||||||
|
@ -93,7 +93,7 @@ hazard3_instr_decompress #(
|
||||||
.instr_is_32bit (d_instr_is_32bit),
|
.instr_is_32bit (d_instr_is_32bit),
|
||||||
.instr_out (d_instr),
|
.instr_out (d_instr),
|
||||||
.instr_out_uop_nonfinal (uop_nonfinal),
|
.instr_out_uop_nonfinal (uop_nonfinal),
|
||||||
.instr_out_uop_uninterruptible (uop_uninterruptible),
|
.instr_out_uop_atomic (uop_atomic),
|
||||||
.instr_out_uop_stall (uop_stall),
|
.instr_out_uop_stall (uop_stall),
|
||||||
.instr_out_uop_clear (uop_clear),
|
.instr_out_uop_clear (uop_clear),
|
||||||
|
|
||||||
|
@ -102,7 +102,7 @@ hazard3_instr_decompress #(
|
||||||
.invalid (d_invalid_16bit)
|
.invalid (d_invalid_16bit)
|
||||||
);
|
);
|
||||||
|
|
||||||
assign d_uninterruptible = uop_uninterruptible && !d_invalid;
|
assign d_uninterruptible = uop_atomic && !d_invalid;
|
||||||
assign d_no_pc_increment = uop_nonfinal && !d_invalid;
|
assign d_no_pc_increment = uop_nonfinal && !d_invalid;
|
||||||
assign uop_stall = x_stall || d_starved;
|
assign uop_stall = x_stall || d_starved;
|
||||||
assign uop_clear = f_jump_now;
|
assign uop_clear = f_jump_now;
|
||||||
|
|
|
@ -427,7 +427,7 @@ if (EXTENSION_ZCMP) begin: have_uop_ctr;
|
||||||
`ifdef HAZARD3_ASSERTIONS
|
`ifdef HAZARD3_ASSERTIONS
|
||||||
assert(uop_ctr == 4'h0 || in_uop_seq);
|
assert(uop_ctr == 4'h0 || in_uop_seq);
|
||||||
if (uop_seq_end) begin
|
if (uop_seq_end) begin
|
||||||
assert(in_uop_seq));
|
assert(in_uop_seq);
|
||||||
assert(instr_out_uop_stall || uop_ctr_nxt == 4'h0);
|
assert(instr_out_uop_stall || uop_ctr_nxt == 4'h0);
|
||||||
end
|
end
|
||||||
`endif
|
`endif
|
||||||
|
|
Loading…
Reference in New Issue