Add mconfigptr CSR

This commit is contained in:
Luke Wren 2021-12-01 03:25:45 +00:00
parent fad64bb6c9
commit c5e85dea4c
5 changed files with 9141 additions and 8754 deletions

File diff suppressed because it is too large Load Diff

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@ -61,6 +61,18 @@ Hart identification register. Read-only, configurable constant.
| 31:0 | - | Hazard3 cores possess only one hardware thread, so this is a unique per-core identifier, assigned consecutively from 0.
|===
==== mconfigptr
Address: `0xf15`
Pointer to configuration data structure. Read-only, configurable constant.
[cols="10h,20h,~", options="header"]
|===
| Bits | Name | Description
| 31:0 | - | Either pointer to configuration data structure, containing information about the harts and system, or all-zeroes. At least 4-byte-aligned.
|===
==== mstatus
Address: `0x300`
@ -315,7 +327,7 @@ Unimplemented. Access will cause an illegal instruction exception.
=== Standard Debug Mode CSRs
This section describes the Debug Mode CSRs, which are follow the 0.13.2 RISC-V debug specification. The <<debug-chapter>> section gives more detail on the remainder of Hazard3's debug implementation, including the Debug Module.
This section describes the Debug Mode CSRs, which follow the 0.13.2 RISC-V debug specification. The <<debug-chapter>> section gives more detail on the remainder of Hazard3's debug implementation, including the Debug Module.
All Debug Mode CSRs are 32-bit; DXLEN is always 32.

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@ -74,13 +74,17 @@ parameter NUM_IRQ = 32,
// JEDEC JEP106-compliant vendor ID, can be left at 0 if "not implemented or
// [...] this is a non-commercial implementation" (RISC-V spec).
// 31:7 is continuation code count, 6:0 is ID. Parity bit is not stored.
parameter MVENDORID_VAL = 32'h0,
parameter MVENDORID_VAL = 32'h0,
// Implementation ID for this specific version of Hazard3. Git hash is perfect.
parameter MIMPID_VAL = 32'h0,
parameter MIMPID_VAL = 32'h0,
// Each core has a single hardware thread. Multiple cores should have unique IDs.
parameter MHARTID_VAL = 32'h0,
parameter MHARTID_VAL = 32'h0,
// Pointer to configuration structure blob, or all-zeroes. Must be at least
// 4-byte-aligned.
parameter MCONFIGPTR_VAL = 32'h0,
// ----------------------------------------------------------------------------
// Performance/size options

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@ -18,6 +18,7 @@
.MVENDORID_VAL (MVENDORID_VAL),
.MIMPID_VAL (MIMPID_VAL),
.MHARTID_VAL (MHARTID_VAL),
.MCONFIGPTR_VAL (MCONFIGPTR_VAL),
.REDUCED_BYPASS (REDUCED_BYPASS),
.MULDIV_UNROLL (MULDIV_UNROLL),
.MUL_FAST (MUL_FAST),

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@ -120,6 +120,7 @@ localparam MVENDORID = 12'hf11; // Vendor ID.
localparam MARCHID = 12'hf12; // Architecture ID.
localparam MIMPID = 12'hf13; // Implementation ID.
localparam MHARTID = 12'hf14; // Hardware thread ID.
localparam MCONFIGPTR = 12'hf15; // Pointer to configuration data structure.
// Machine Trap Setup (RW)
localparam MSTATUS = 12'h300; // Machine status register.
@ -616,6 +617,11 @@ always @ (*) begin
rdata = MHARTID_VAL;
end
MCONFIGPTR: if (CSR_M_MANDATORY) begin
decode_match = !wen_soon; // MRO
rdata = MCONFIGPTR_VAL;
end
MSTATUS: if (CSR_M_MANDATORY || CSR_M_TRAP) begin
decode_match = 1'b1;
rdata = {