From ca40c077bee4598ccb80cc3d4ad2b69704d53a1f Mon Sep 17 00:00:00 2001 From: Luke Wren Date: Fri, 31 Mar 2023 02:14:22 +0100 Subject: [PATCH] Capture JTAG bitbang log from most recent SMP debug test. Regarding intermittent failure of SMP debug MemorySampleSingle test: https://twitter.com/wren6991/status/1640153934445543426 Seems to be an OpenOCD issue, not a Hazard3 issue. --- test/sim/riscv-tests/run-smp-debug-tests.sh | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/test/sim/riscv-tests/run-smp-debug-tests.sh b/test/sim/riscv-tests/run-smp-debug-tests.sh index b4594df..4275e84 100755 --- a/test/sim/riscv-tests/run-smp-debug-tests.sh +++ b/test/sim/riscv-tests/run-smp-debug-tests.sh @@ -11,7 +11,7 @@ done # Only applicable tests are included ./gdbserver.py \ - --sim_cmd "../../../tb_cxxrtl/tb_multicore --port 9824" \ + --sim_cmd "../../../tb_cxxrtl/tb_multicore --port 9824 --jtagdump jtag_bitbang.txt" \ --server_cmd "riscv-openocd" \ --gdb riscv32-unknown-elf-gdb \ --gcc riscv32-unknown-elf-gcc \