Add new bus signals on instruction_fetch_match/tb.v
This commit is contained in:
Luke Wren
parent
b655148148
commit
cd3125b6e5
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@ -11,61 +11,101 @@ always @ (posedge clk)
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// ----------------------------------------------------------------------------
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// DUT
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(* keep *) wire [31:0] i_haddr;
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(* keep *) wire i_hwrite;
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(* keep *) wire [1:0] i_htrans;
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(* keep *) wire [2:0] i_hsize;
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(* keep *) wire [2:0] i_hburst;
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(* keep *) wire [3:0] i_hprot;
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(* keep *) wire i_hmastlock;
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(* keep *) wire i_hready;
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(* keep *) wire i_hresp;
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(* keep *) wire [31:0] i_hwdata;
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(* keep *) wire [31:0] i_hrdata;
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(* keep *) wire [31:0] i_haddr;
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(* keep *) wire i_hwrite;
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(* keep *) wire [1:0] i_htrans;
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(* keep *) wire [2:0] i_hsize;
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(* keep *) wire [2:0] i_hburst;
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(* keep *) wire [3:0] i_hprot;
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(* keep *) wire i_hmastlock;
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(* keep *) wire i_hready;
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(* keep *) wire i_hresp;
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(* keep *) wire [31:0] i_hwdata;
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(* keep *) wire [31:0] i_hrdata;
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(* keep *) wire [31:0] d_haddr;
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(* keep *) wire d_hwrite;
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(* keep *) wire [1:0] d_htrans;
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(* keep *) wire [2:0] d_hsize;
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(* keep *) wire [2:0] d_hburst;
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(* keep *) wire [3:0] d_hprot;
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(* keep *) wire d_hmastlock;
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(* keep *) wire d_hready;
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(* keep *) wire d_hresp;
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(* keep *) wire [31:0] d_hwdata;
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(* keep *) wire [31:0] d_hrdata;
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(* keep *) wire [31:0] d_haddr;
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(* keep *) wire d_hwrite;
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(* keep *) wire [1:0] d_htrans;
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(* keep *) wire [2:0] d_hsize;
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(* keep *) wire [2:0] d_hburst;
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(* keep *) wire [3:0] d_hprot;
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(* keep *) wire d_hmastlock;
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(* keep *) wire d_hexcl;
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(* keep *) wire d_hready;
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(* keep *) wire d_hresp;
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(* keep *) wire d_hexokay;
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(* keep *) wire [31:0] d_hwdata;
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(* keep *) wire [31:0] d_hrdata;
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(* keep *) reg [15:0] irq;
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localparam W_DATA = 32;
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// Don't allow debug, as this breaks the CIR == mem[PC] invariant that we're trying to test.
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(* keep *) wire dbg_req_halt = 1'b0;
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(* keep *) wire dbg_req_halt_on_reset = 1'b0;
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(* keep *) wire dbg_req_resume = 1'b0;
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(* keep *) wire dbg_halted;
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(* keep *) wire dbg_running;
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(* keep *) wire [W_DATA-1:0] dbg_data0_rdata;
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(* keep *) wire [W_DATA-1:0] dbg_data0_wdata;
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(* keep *) wire dbg_data0_wen;
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(* keep *) wire [W_DATA-1:0] dbg_instr_data;
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(* keep *) wire dbg_instr_data_vld;
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(* keep *) wire dbg_instr_data_rdy;
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(* keep *) wire dbg_instr_caught_exception;
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(* keep *) wire dbg_instr_caught_ebreak;
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(* keep *) wire [31:0] irq;
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(* keep *) wire soft_irq;
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(* keep *) wire timer_irq;
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hazard3_cpu_2port dut (
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.clk (clk),
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.rst_n (rst_n),
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.clk (clk),
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.rst_n (rst_n),
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.i_haddr (i_haddr),
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.i_hwrite (i_hwrite),
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.i_htrans (i_htrans),
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.i_hsize (i_hsize),
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.i_hburst (i_hburst),
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.i_hprot (i_hprot),
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.i_hmastlock (i_hmastlock),
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.i_hready (i_hready),
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.i_hresp (i_hresp),
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.i_hwdata (i_hwdata),
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.i_hrdata (i_hrdata),
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.i_haddr (i_haddr),
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.i_hwrite (i_hwrite),
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.i_htrans (i_htrans),
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.i_hsize (i_hsize),
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.i_hburst (i_hburst),
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.i_hprot (i_hprot),
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.i_hmastlock (i_hmastlock),
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.i_hready (i_hready),
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.i_hresp (i_hresp),
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.i_hwdata (i_hwdata),
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.i_hrdata (i_hrdata),
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.d_haddr (d_haddr),
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.d_hwrite (d_hwrite),
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.d_htrans (d_htrans),
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.d_hsize (d_hsize),
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.d_hburst (d_hburst),
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.d_hprot (d_hprot),
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.d_hmastlock (d_hmastlock),
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.d_hready (d_hready),
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.d_hresp (d_hresp),
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.d_hwdata (d_hwdata),
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.d_hrdata (d_hrdata),
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.d_haddr (d_haddr),
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.d_hwrite (d_hwrite),
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.d_htrans (d_htrans),
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.d_hsize (d_hsize),
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.d_hburst (d_hburst),
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.d_hprot (d_hprot),
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.d_hmastlock (d_hmastlock),
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.d_hexcl (d_hexcl),
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.d_hready (d_hready),
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.d_hresp (d_hresp),
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.d_hexokay (d_hexokay),
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.d_hwdata (d_hwdata),
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.d_hrdata (d_hrdata),
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.irq (irq)
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.dbg_req_halt (dbg_req_halt),
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.dbg_req_halt_on_reset (dbg_req_halt_on_reset),
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.dbg_req_resume (dbg_req_resume),
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.dbg_halted (dbg_halted),
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.dbg_running (dbg_running),
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.dbg_data0_rdata (dbg_data0_rdata),
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.dbg_data0_wdata (dbg_data0_wdata),
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.dbg_data0_wen (dbg_data0_wen),
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.dbg_instr_data (dbg_instr_data),
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.dbg_instr_data_vld (dbg_instr_data_vld),
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.dbg_instr_data_rdy (dbg_instr_data_rdy),
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.dbg_instr_caught_exception (dbg_instr_caught_exception),
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.dbg_instr_caught_ebreak (dbg_instr_caught_ebreak),
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.irq (irq),
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.soft_irq (soft_irq),
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.timer_irq (timer_irq)
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);
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// ----------------------------------------------------------------------------
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@ -83,6 +123,7 @@ ahbl_slave_assumptions #(
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.dst_hready_resp (i_hready),
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.dst_hready (i_hready),
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.dst_hresp (i_hresp),
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.dst_hexokay (1'b0),
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.dst_haddr (i_haddr),
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.dst_hwrite (i_hwrite),
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.dst_htrans (i_htrans),
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@ -90,6 +131,7 @@ ahbl_slave_assumptions #(
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.dst_hburst (i_hburst),
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.dst_hprot (i_hprot),
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.dst_hmastlock (i_hmastlock),
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.dst_hexcl (1'b0),
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.dst_hwdata (i_hwdata),
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.dst_hrdata (i_hrdata)
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);
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@ -103,6 +145,7 @@ ahbl_slave_assumptions #(
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.dst_hready_resp (d_hready),
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.dst_hready (d_hready),
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.dst_hresp (d_hresp),
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.dst_hexokay (d_hexokay),
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.dst_haddr (d_haddr),
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.dst_hwrite (d_hwrite),
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.dst_htrans (d_htrans),
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@ -110,6 +153,7 @@ ahbl_slave_assumptions #(
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.dst_hburst (d_hburst),
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.dst_hprot (d_hprot),
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.dst_hmastlock (d_hmastlock),
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.dst_hexcl (d_hexcl),
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.dst_hwdata (d_hwdata),
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.dst_hrdata (d_hrdata)
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);
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