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Remove some old todos

This commit is contained in:
Luke Wren 2021-09-05 22:20:40 +01:00
parent e9fccffca0
commit cfe16caf41
2 changed files with 3 additions and 5 deletions
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2
hdl/hazard3_core.v
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@ -524,7 +524,7 @@ hazard3_csr #(
// CSR access port // CSR access port
// *en_soon are early access strobes which are not a function of bus stall. // *en_soon are early access strobes which are not a function of bus stall.
// Can generate access faults (hence traps), but do not actually perform access. // Can generate access faults (hence traps), but do not actually perform access.
.addr (d_imm[11:0]), // todo could just connect this to the instruction bits .addr (fd_cir[31:20]), // Always I-type immediate
.wdata (x_csr_wdata), .wdata (x_csr_wdata),
.wen_soon (d_csr_wen && !m_trap_enter_soon), .wen_soon (d_csr_wen && !m_trap_enter_soon),
.wen (d_csr_wen && !m_trap_enter_soon && !x_stall), .wen (d_csr_wen && !m_trap_enter_soon && !x_stall),

6
hdl/hazard3_csr.v
View File

@ -105,8 +105,6 @@ module hazard3_csr #(
input wire instr_ret input wire instr_ret
); );
// TODO block CSR access when entering trap?
`include "hazard3_ops.vh" `include "hazard3_ops.vh"
localparam X0 = {XLEN{1'b0}}; localparam X0 = {XLEN{1'b0}};
@ -650,8 +648,8 @@ always @ (*) begin
// ------------------------------------------------------------------------ // ------------------------------------------------------------------------
// Trap-handling CSRs // Trap-handling CSRs
// TODO bit of a hack but this is a 32 bit synthesised register with // This is a 32 bit synthesised register with set/clear/write/read, don't
// set/clear/write/read, don't turn it on unless we really have to // turn it on unless we really have to
MSCRATCH: if (CSR_M_TRAP && CSR_M_MANDATORY) begin MSCRATCH: if (CSR_M_TRAP && CSR_M_MANDATORY) begin
decode_match = 1'b1; decode_match = 1'b1;
rdata = mscratch; rdata = mscratch;