From d1b5f83b7ac4a5583beeafd8e49d069a8f8e2e22 Mon Sep 17 00:00:00 2001
From: Luke Wren <wren6991@gmail.com>
Date: Sat, 18 Dec 2021 02:41:50 +0000
Subject: [PATCH] Beef up the ULX3S SoC again now that atomics aren't so
 disastrous for timing

---
 example_soc/fpga/fpga_ulx3s.v | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/example_soc/fpga/fpga_ulx3s.v b/example_soc/fpga/fpga_ulx3s.v
index 284e6c8..e7509a0 100644
--- a/example_soc/fpga/fpga_ulx3s.v
+++ b/example_soc/fpga/fpga_ulx3s.v
@@ -33,7 +33,7 @@ fpga_reset #(
 
 example_soc #(
 	.DTM_TYPE      ("ECP5"),
-	.SRAM_DEPTH    (1 << 12),
+	.SRAM_DEPTH    (1 << 15),
 
 	.EXTENSION_M   (1),
 	.EXTENSION_A   (1),
@@ -43,7 +43,7 @@ example_soc #(
 	.EXTENSION_ZBC (0),
 	.EXTENSION_ZBS (0),
 	.CSR_COUNTER   (0),
-	.MUL_FAST      (0),
+	.MUL_FAST      (1),
 	.MULDIV_UNROLL (1)
 ) soc_u (
 	.clk     (clk_sys),