diff --git a/test/sim/openocd/tb.cpp b/test/sim/openocd/tb.cpp
index 26a0c8e..da39a55 100644
--- a/test/sim/openocd/tb.cpp
+++ b/test/sim/openocd/tb.cpp
@@ -17,7 +17,6 @@ static const unsigned int MEM_SIZE = 16 * 1024 * 1024;
 uint8_t mem[MEM_SIZE];
 
 static const unsigned int IO_BASE = 0x80000000;
-static const unsigned int IO_MASK = 0xffffff00;
 enum {
 	IO_PRINT_CHAR = 0x000,
 	IO_PRINT_U32  = 0x004,
@@ -276,7 +275,7 @@ int main(int argc, char **argv) {
 				}
 			}
 			else if (bus_trans && !bus_write) {
-				if (bus_addr <= MEM_SIZE) {
+				if (bus_addr <= MEM_SIZE - (1u << bus_size)) {
 					bus_addr &= ~0x3u;
 					rdata =
 						(uint32_t)mem[bus_addr] |
@@ -323,7 +322,7 @@ int main(int argc, char **argv) {
 			top.p_i__hresp.set<bool>(false);
 			if (bus_trans_i) {
 				bus_addr_i &= ~0x3u;
-				if (bus_addr_i <= MEM_SIZE - 4u) {
+				if (bus_addr_i < MEM_SIZE) {
 					top.p_i__hrdata.set<uint32_t>(
 						(uint32_t)mem[bus_addr_i] |
 						mem[bus_addr_i + 1] << 8 |
diff --git a/test/sim/openocd/waves.gtkw b/test/sim/openocd/waves.gtkw
index d27663c..f208a6d 100644
--- a/test/sim/openocd/waves.gtkw
+++ b/test/sim/openocd/waves.gtkw
@@ -1,15 +1,15 @@
 [*]
 [*] GTKWave Analyzer v3.3.103 (w)1999-2019 BSI
-[*] Sat Jul 17 18:39:08 2021
+[*] Sat Sep  4 00:39:00 2021
 [*]
 [dumpfile] "/home/luke/proj/hazard3/test/sim/openocd/waves.vcd"
-[dumpfile_mtime] "Sat Jul 17 18:35:01 2021"
-[dumpfile_size] 6773918
+[dumpfile_mtime] "Sat Sep  4 00:36:35 2021"
+[dumpfile_size] 31718403
 [savefile] "/home/luke/proj/hazard3/test/sim/openocd/waves.gtkw"
-[timestart] 0
+[timestart] 877885
 [size] 1920 1043
 [pos] 174 41
-*-15.000000 128200 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
+*-3.000000 877889 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
 [treeopen] cpu.
 [treeopen] cpu.core.
 [treeopen] inst_hazard3_jtag_dtm.
@@ -34,9 +34,6 @@ tdo
 @22
 inst_hazard3_jtag_dtm.tap_state[3:0]
 inst_hazard3_jtag_dtm.ir[4:0]
-@28
-inst_hazard3_jtag_dtm.dmi_cmderr[1:0]
-inst_hazard3_jtag_dtm.dmi_busy
 @200
 -
 -DMI
@@ -90,10 +87,20 @@ cpu.core.bus_dph_err_d
 cpu.core.inst_hazard3_csr.addr[11:0]
 @28
 cpu.core.inst_hazard3_csr.wen
-@29
 cpu.core.inst_hazard3_csr.ren_soon
 @200
 -
+-I Bus
+@22
+cpu.i_haddr[31:0]
+@28
+cpu.i_htrans[1:0]
+cpu.i_hready
+cpu.i_hresp
+@23
+cpu.i_hrdata[31:0]
+@200
+-
 -D Bus
 @22
 d_haddr[31:0]