Add zicsr to march in makefiles

test/sim/coremark/dist/barebones/core_portme.mak

@@ -24,7 +24,7 @@ LD		= riscv32-unknown-elf-gcc
 AS		= riscv32-unknown-elf-gcc
 # Flag : CFLAGS
 #	Use this flag to define compiler options. Note, you can add compiler options from the command line using XCFLAGS="other flags"
-PORT_CFLAGS = -O3 -g -march=rv32imc -fno-common -funroll-loops -finline-functions --param max-inline-insns-auto=20 -falign-functions=4 -falign-jumps=4 -falign-loops=4
+PORT_CFLAGS = -O3 -g -march=rv32imc_zicsr_zba_zbb_zbc_zbs -fno-common -funroll-loops -finline-functions --param max-inline-insns-auto=20 -falign-functions=4 -falign-jumps=4 -falign-loops=4
 FLAGS_STR = "$(PORT_CFLAGS) $(XCFLAGS) $(XLFLAGS) $(LFLAGS_END)"
 CFLAGS = $(PORT_CFLAGS) -I$(PORT_DIR) -I. -DFLAGS_STR=\"$(FLAGS_STR)\" 
 #Flag : LFLAGS_END
@@ -35,7 +35,7 @@ SEPARATE_COMPILE=1
 # You must also define below how to create an object file, and how to link.
 OBJOUT 	= -o
 LFLAGS 	= -T ../../common/memmap.ld
-ASFLAGS = -c
+ASFLAGS = -c -march=rv32imc_zicsr
 OFLAG 	= -o
 COUT 	= -c
 

test/sim/dhrystone/Makefile

@@ -1,6 +1,6 @@
 SRCS       := ../common/init.S src/dhrystone_main.c src/dhrystone.c src/util.c
 APP        := dhrystone
-CCFLAGS    := -O3 -fno-inline -march=rv32im
+CCFLAGS    := -O3 -fno-inline -march=rv32im_zicsr
 MAX_CYCLES := 1000000
 
 include ../common/src_only_app.mk

test/sim/hellow/Makefile

@@ -1,5 +1,6 @@
 SRCS := ../common/init.S main.c
 APP  := hellow
-CCFLAGS = -march=rv32imc -Os
+CCFLAGS = -march=rv32i_zicsr_zba_zbb_zbc_zbs -Os
+AFLAGS = -march=rv32i_zicsr_zba_zbb_zbc_zbs
 
 include ../common/src_only_app.mk

test/sim/sw_testcases/Makefile

@@ -1,6 +1,6 @@
 APP        := hellow
 SRCS       := ../common/init.S $(APP).c
-CCFLAGS    := -march=rv32imac -Os
+CCFLAGS    := -march=rv32imac_zicsr -Os
 MAX_CYCLES := 1000000
 INCDIR     := include ../common