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Oops, try a little harder this time to ensure local monitor is cleared by sc.w errors _always_, even if lined up with trap entry stalls etc

This commit is contained in:
Luke Wren 2021-12-12 23:32:01 +00:00
parent 25b44d04cf
commit f1cda26bcc
1 changed files with 1 additions and 1 deletions
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hdl/hazard3_core.v
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@ -936,7 +936,7 @@ end
always @ (posedge clk or negedge rst_n) begin always @ (posedge clk or negedge rst_n) begin
if (!rst_n) begin if (!rst_n) begin
mw_local_exclusive_reserved <= 1'b0; mw_local_exclusive_reserved <= 1'b0;
end else if (|EXTENSION_A && !m_stall) begin end else if (|EXTENSION_A && (!m_stall || bus_dph_err_d)) begin
`ifdef FORMAL `ifdef FORMAL
// AMOs should handle the entire bus transfer in stage X. // AMOs should handle the entire bus transfer in stage X.
assert(xm_memop != MEMOP_AMOADD_W); assert(xm_memop != MEMOP_AMOADD_W);