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Typo in readme

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Luke Wren 2024-08-07 22:22:05 -07:00
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Readme.md
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@ -302,7 +302,7 @@ info reg a0
There is a tiny [example SoC](example_soc/soc/example_soc.v) which builds on both iCEBreaker and ULX3S. The SoC contains: There is a tiny [example SoC](example_soc/soc/example_soc.v) which builds on both iCEBreaker and ULX3S. The SoC contains:
- A Hazard3 processor, in a single-ported RV32IM configuration, with debug support - A Hazard3 processor, in a single-ported RV32IMA configuration, with debug support
- A Debug Transport Module and Debug Module to access Hazard3's debug interface - A Debug Transport Module and Debug Module to access Hazard3's debug interface
- 128 kB of RAM (fits in UP5k SPRAMs) - 128 kB of RAM (fits in UP5k SPRAMs)
- A UART - A UART