From fadb9601dee8da998ae29f6ede805af8b14237bb Mon Sep 17 00:00:00 2001
From: Luke Wren <wren6991@gmail.com>
Date: Fri, 10 Dec 2021 00:11:18 +0000
Subject: [PATCH] Illegal instruction test

---
 test/sim/sw_testcases/amo_timer_irq.gtkw      |  3 +-
 test/sim/sw_testcases/illegal_instr.c         | 53 +++++++++++++++++++
 .../illegal_instr.expected_output             | 15 ++++++
 3 files changed, 69 insertions(+), 2 deletions(-)
 create mode 100644 test/sim/sw_testcases/illegal_instr.c
 create mode 100644 test/sim/sw_testcases/illegal_instr.expected_output

diff --git a/test/sim/sw_testcases/amo_timer_irq.gtkw b/test/sim/sw_testcases/amo_timer_irq.gtkw
index 648884f..e7338b3 100644
--- a/test/sim/sw_testcases/amo_timer_irq.gtkw
+++ b/test/sim/sw_testcases/amo_timer_irq.gtkw
@@ -2,10 +2,9 @@
 [*] GTKWave Analyzer v3.3.103 (w)1999-2019 BSI
 [*] Sat Dec  4 23:25:19 2021
 [*]
-[dumpfile] "amo_timer_irq_run.vcd"
+[dumpfile] "tmp/amo_timer_irq_run.vcd"
 [dumpfile_mtime] "Sat Dec  4 23:21:36 2021"
 [dumpfile_size] 6246687
-[savefile] "/home/luke/proj/hazard3/test/sim/amo_smoke/amo_smoke.gtkw"
 [timestart] 420
 [size] 1975 1095
 [pos] -1 -1
diff --git a/test/sim/sw_testcases/illegal_instr.c b/test/sim/sw_testcases/illegal_instr.c
new file mode 100644
index 0000000..7e4235e
--- /dev/null
+++ b/test/sim/sw_testcases/illegal_instr.c
@@ -0,0 +1,53 @@
+#include "tb_cxxrtl_io.h"
+
+#define read_csr(csrname) ({ \
+  uint32_t __csr_tmp_u32; \
+  asm volatile ("csrr %0, " #csrname : "=r" (__csr_tmp_u32)); \
+  __csr_tmp_u32; \
+})
+
+#define write_csr(csrname, data) ({ \
+	asm volatile ("csrw " #csrname ", %0" : : "r" (data)); \
+})
+
+
+int main() {
+	tb_puts("1: defined illegal all-zeroes\n");
+	asm volatile (".hword 0x0000");
+
+	tb_puts("2: defined illegal all-ones\n");
+	asm volatile (".word 0xffffffff");
+
+	tb_puts("3: unimplemented CSR 0xfff\n");
+	uint32_t junk;
+	asm volatile ("csrr %0, 0xfff" : "=r" (junk));
+
+	tb_puts("4: write to read-only CSR\n");
+	asm volatile ("csrw mvendorid, zero");
+	// However a clear/set with zero value does not count as a write, so this
+	// won't appear in the printf output:
+	asm volatile ("csrs mvendorid, zero");
+
+	tb_puts("5: unimplemented instruction (F extension)\n");
+	asm volatile (".word 0x00052087"); // flw ft1, (a0)
+
+	return 0;
+}
+
+void __attribute__((interrupt)) handle_exception() {
+	uintptr_t mepc = read_csr(mepc);
+	uint32_t mcause = read_csr(mcause);
+	tb_printf("Exception, mcause = %u\n", mcause);
+
+	uint16_t i0 = *(uint16_t*)mepc;
+	if (i0 & 0x3u == 0x3u) {
+		uint16_t i1 = *(uint16_t*)(mepc + 2);
+		tb_printf("32-bit illegal instruction: %04x%04x\n", i1, i0);
+		mepc += 4;
+	}
+	else {
+		tb_printf("16-bit illegal instruction: %04x\n", i0);
+		mepc += 2;
+	}
+	write_csr(mepc, mepc);
+}
diff --git a/test/sim/sw_testcases/illegal_instr.expected_output b/test/sim/sw_testcases/illegal_instr.expected_output
new file mode 100644
index 0000000..f19f375
--- /dev/null
+++ b/test/sim/sw_testcases/illegal_instr.expected_output
@@ -0,0 +1,15 @@
+1: defined illegal all-zeroes
+Exception, mcause = 2
+16-bit illegal instruction: 0000
+2: defined illegal all-ones
+Exception, mcause = 2
+32-bit illegal instruction: ffffffff
+3: unimplemented CSR 0xfff
+Exception, mcause = 2
+32-bit illegal instruction: fff027f3
+4: write to read-only CSR
+Exception, mcause = 2
+32-bit illegal instruction: f1101073
+5: unimplemented instruction (F extension)
+Exception, mcause = 2
+32-bit illegal instruction: 00052087