19 lines
762 B
Plaintext
19 lines
762 B
Plaintext
[submodule "test/sim/riscv-compliance/riscv-arch-test"]
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path = test/sim/riscv-compliance/riscv-arch-test
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url = https://github.com/wren6991/riscv-arch-test.git
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[submodule "scripts"]
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path = scripts
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url = https://github.com/Wren6991/fpgascripts
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[submodule "test/formal/riscv-formal"]
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path = test/formal/riscv-formal/riscv-formal
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url = https://github.com/Wren6991/riscv-formal.git
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[submodule "example_soc/libfpga"]
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path = example_soc/libfpga
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url = https://github.com/Wren6991/libfpga.git
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[submodule "test/sim/riscv-tests/riscv-tests"]
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path = test/sim/riscv-tests/riscv-tests
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url = https://github.com/Wren6991/riscv-tests.git
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[submodule "test/sim/embench/embench-iot"]
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path = test/sim/embench/embench-iot
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url = https://github.com/Wren6991/embench-iot.git
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