Colin 3255e9e952 Pass ECP5 fpga and jlink debug core.		2025-04-02 10:41:27 +08:00
..
fpga	Add OrangeCrab 25F support (#7)	2022-12-17 11:49:41 +00:00
libfpga@9d50e12e01	Bump libfpga for correct bus error response from AHBL splitter in example SoC	2021-11-28 01:35:52 +00:00
soc	Pass ECP5 fpga and jlink debug core.	2025-04-02 10:41:27 +08:00
synth	Do not rely on environment variables for any intra-project paths	2024-05-27 16:53:06 +01:00
icebreaker-openocd.cfg	Small code cleanup	2021-07-24 10:08:27 +01:00
project_paths.mk	Do not rely on environment variables for any intra-project paths	2024-05-27 16:53:06 +01:00
ulx3s-openocd.cfg	Working ECP5 debug, seems a bit slow but maybe just due to bitbanged FT231X JTAG.	2021-07-23 18:32:47 +01:00