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Hazard3/example_soc/synth
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Luke Wren 2ae30183aa Working ECP5 debug, seems a bit slow but maybe just due to bitbanged FT231X JTAG. 2021-07-23 18:32:47 +01:00
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.gitignore Add simple example SoC, hangs nextpnr for some reason! 2021-07-13 03:40:06 +01:00
Icebreaker.mk Working ECP5 debug, seems a bit slow but maybe just due to bitbanged FT231X JTAG. 2021-07-23 18:32:47 +01:00
Makefile Working ECP5 debug, seems a bit slow but maybe just due to bitbanged FT231X JTAG. 2021-07-23 18:32:47 +01:00
ULX3S.mk Working ECP5 debug, seems a bit slow but maybe just due to bitbanged FT231X JTAG. 2021-07-23 18:32:47 +01:00
fpga_icebreaker.pcf Example soc tweaks, add openocd config 2021-07-16 20:44:25 +01:00
fpga_ulx3s.lpf Working ECP5 debug, seems a bit slow but maybe just due to bitbanged FT231X JTAG. 2021-07-23 18:32:47 +01:00