Luke Wren 42632e325a Fix brokenness of JTAG-DTM and CDC, add openocd remote bitbang testbench for DTM + DM + core		2021-07-12 21:21:16 +01:00
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common	Increasing p2align on vectors from 8 to 12 (as it was originally) makes coremark go back up from 2.91 to 2.92. Still mystified as to why.	2021-06-04 09:19:18 +01:00
core_debug	Add smoke test for core debug interface, and suppress bus fetch incrementing frontend level counter when in debug mode	2021-07-10 21:02:18 +01:00
coremark	Update init.S for new IRQ functionality	2021-06-04 08:16:54 +01:00
debug_module_vectors	Fix some bugs/typos in DM, add a tb to run read/write vectors against DM, confirm that GPR read/write works	2021-07-11 16:20:39 +01:00
debug_openocd_bitbang	Fix brokenness of JTAG-DTM and CDC, add openocd remote bitbang testbench for DTM + DM + core	2021-07-12 21:21:16 +01:00
dhrystone	Organise test directory into formal and sim	2021-05-23 07:42:35 +01:00
ecall_simple	Update init.S for new IRQ functionality	2021-06-04 08:16:54 +01:00
hellow	Update init.S for new IRQ functionality	2021-06-04 08:16:54 +01:00
riscv-compliance	Add 32IM testlist	2021-06-05 12:03:05 +01:00
rvcpp	Organise test directory into formal and sim	2021-05-23 07:42:35 +01:00
rvpy	Organise test directory into formal and sim	2021-05-23 07:42:35 +01:00
tb_cxxrtl	Add smoke test for core debug interface, and suppress bus fetch incrementing frontend level counter when in debug mode	2021-07-10 21:02:18 +01:00