47 lines
1.3 KiB
Makefile
47 lines
1.3 KiB
Makefile
# To build single-core dual-port tb: make
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# To build dual-core single-port tb: make DOTF=tb_multicore.f
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include ../project_paths.mk
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TOP := example_soc
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DOTF := tb.f
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CONFIG := default
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TBEXEC := $(patsubst %.f,%,$(DOTF))
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FILE_LIST := $(shell HDL=$(HDL) $(SCRIPTS)/listfiles $(DOTF))
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BUILD_DIR := build-$(patsubst %.f,%,$(DOTF))
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# Note: clang++-18 has a >20x compile time regression, even at low
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# optimisation levels. I have tried clang++-16 and clang++-17, both fine.
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CLANGXX := clang++-16
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.PHONY: clean all lint
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all: $(TBEXEC)
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SYNTH_CMD += read_verilog -I ../../../hdl -DCONFIG_HEADER="config_$(CONFIG).vh" $(FILE_LIST);
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SYNTH_CMD += hierarchy -top $(TOP);
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SYNTH_CMD += write_cxxrtl $(BUILD_DIR)/dut.cpp
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$(BUILD_DIR)/dut.cpp: $(FILE_LIST) $(wildcard *.vh)
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mkdir -p $(BUILD_DIR)
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yosys -p '$(SYNTH_CMD)' 2>&1 > $(BUILD_DIR)/cxxrtl.log
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clean::
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rm -rf $(BUILD_DIR) $(TBEXEC)
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sim: $(TBEXEC)
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./$(TBEXEC) --port 9824
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openocd:
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openocd -f openocd.cfg
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gdb:
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/opt/riscv/bin/riscv32-unknown-elf-gdb -x gdb_init
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$(TBEXEC): $(BUILD_DIR)/dut.cpp tb.cpp
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$(CLANGXX) -O3 -std=c++14 $(addprefix -D,$(CDEFINES) $(CDEFINES_$(DOTF))) -I $(shell yosys-config --datdir)/include/backends/cxxrtl/runtime -I $(BUILD_DIR) tb.cpp -o $(TBEXEC)
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lint:
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verilator --lint-only --top-module $(TOP) -I$(HDL) $(FILE_LIST)
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