Hazard3/hdl
Luke Wren 9a60f06c43 Fix trigger enable condition 2022-08-23 01:05:46 +01:00
..
arith Standardise on ifndef YOSYS around default_nettype wire 2022-08-21 13:22:55 +01:00
debug Standardise on ifndef YOSYS around default_nettype wire 2022-08-21 13:22:55 +01:00
hazard3.f First attempt at hacking in triggers, at least seems to have not broken other exception logic. Not yet tested. 2022-08-22 08:47:03 +01:00
hazard3_config.vh First attempt at hacking in triggers, at least seems to have not broken other exception logic. Not yet tested. 2022-08-22 08:47:03 +01:00
hazard3_config_inst.vh First attempt at hacking in triggers, at least seems to have not broken other exception logic. Not yet tested. 2022-08-22 08:47:03 +01:00
hazard3_core.v Avoid reserved keyword 2022-08-22 10:26:20 +01:00
hazard3_cpu_1port.v First pass at implementing the new IRQ controls. Works well enough that the old tests pass :) 2022-08-07 20:51:12 +01:00
hazard3_cpu_2port.v Cleanup some unused signals 2022-08-20 16:44:39 +01:00
hazard3_csr.v tcontrol.mpte is not supposed to change on trap exit, unlike mstatus.mpie 2022-08-23 00:19:56 +01:00
hazard3_csr_addr.vh First attempt at hacking in triggers, at least seems to have not broken other exception logic. Not yet tested. 2022-08-22 08:47:03 +01:00
hazard3_decode.v Replace localparams with defines in rv_opcodes.vh, to avoid slightly dubious localparam to casez Z-propagation 2022-08-20 16:22:04 +01:00
hazard3_frontend.v Cleanup to avoid negative array index (legal but causes whinging) 2022-08-20 18:13:45 +01:00
hazard3_instr_decompress.v Replace localparams with defines in rv_opcodes.vh, to avoid slightly dubious localparam to casez Z-propagation 2022-08-20 16:22:04 +01:00
hazard3_ops.vh Add a custom instruction (bextm/bextmi: 1 to 8-bit version of bext/bexti from Zbs) for fooling around with toolchains 2022-08-06 23:02:08 +01:00
hazard3_pmp.v Cleanup some unused signals 2022-08-20 16:44:39 +01:00
hazard3_regfile_1w2r.v Standardise on ifndef YOSYS around default_nettype wire 2022-08-21 13:22:55 +01:00
hazard3_triggers.v Fix trigger enable condition 2022-08-23 01:05:46 +01:00
hazard3_width_const.vh Update copyright years 2022-06-09 00:12:01 +01:00
rv_opcodes.vh Fix some whitespace issues, and avoid redefinition of RVOPC macros 2022-08-21 13:09:28 +01:00