Luke Wren 41477ce479 Extract DTM bus/control logic from the JTAG-related parts		2021-07-22 19:26:25 +01:00
..
fpga	Example soc tweaks, add openocd config	2021-07-16 20:44:25 +01:00
libfpga@dd4920f522	Add simple example SoC, hangs nextpnr for some reason!	2021-07-13 03:40:06 +01:00
soc	Extract DTM bus/control logic from the JTAG-related parts	2021-07-22 19:26:25 +01:00
synth	Example soc tweaks, add openocd config	2021-07-16 20:44:25 +01:00
icebreaker-openocd.cfg	Example soc tweaks, add openocd config	2021-07-16 20:44:25 +01:00