Hazard3/example_soc
Luke Wren 91edd62ea1 Bump libfpga for FIFO coding style tweak 2021-07-24 22:06:57 +01:00
..
fpga Add some instructions to Readme 2021-07-24 11:53:08 +01:00
libfpga@f59444817e Bump libfpga for FIFO coding style tweak 2021-07-24 22:06:57 +01:00
soc Small code cleanup 2021-07-24 10:08:27 +01:00
synth Tweaks to example soc configuration 2021-07-23 23:08:23 +01:00
icebreaker-openocd.cfg Small code cleanup 2021-07-24 10:08:27 +01:00
ulx3s-openocd.cfg Working ECP5 debug, seems a bit slow but maybe just due to bitbanged FT231X JTAG. 2021-07-23 18:32:47 +01:00