58 lines
2.1 KiB
Verilog
58 lines
2.1 KiB
Verilog
/******************************************************************************
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* DO WHAT THE FUCK YOU WANT TO AND DON'T BLAME US PUBLIC LICENSE *
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* Version 3, April 2008 *
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* *
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* Copyright (C) 2019 Luke Wren *
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* *
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* Everyone is permitted to copy and distribute verbatim or modified *
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* copies of this license document and accompanying software, and *
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* changing either is allowed. *
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* *
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* TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION *
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* *
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* 0. You just DO WHAT THE FUCK YOU WANT TO. *
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* 1. We're NOT RESPONSIBLE WHEN IT DOESN'T FUCKING WORK. *
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* *
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*****************************************************************************/
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// Really something like this should be in a utility library (or the language!),
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// but Hazard3 is supposed to be self-contained
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module hazard3_priority_encode #(
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parameter W_REQ = 16,
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parameter W_GNT = $clog2(W_REQ) // do not modify
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) (
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input wire [W_REQ-1:0] req,
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output wire [W_GNT-1:0] gnt
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);
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// First do a priority-select of the input bitmap.
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reg [W_REQ-1:0] deny;
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always @ (*) begin: smear
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integer i;
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deny[0] = 1'b0;
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for (i = 1; i < W_REQ; i = i + 1)
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deny[i] = deny[i - 1] || req[i - 1];
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end
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wire [W_REQ-1:0] gnt_onehot = req & ~deny;
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// As the result is onehot, we can now just OR in the representation of each
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// encoded integer.
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reg [W_GNT-1:0] gnt_accum;
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always @ (*) begin: encode
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reg [W_GNT:0] i;
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gnt_accum = {W_GNT{1'b0}};
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for (i = 0; i < W_REQ; i = i + 1) begin
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gnt_accum = gnt_accum | ({W_GNT{gnt_onehot[i]}} & i[W_GNT-1:0]);
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end
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end
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assign gnt = gnt_accum;
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endmodule
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