Hazard3/example_soc
Luke Wren 94a3d43f27 Add Hazard3's registered marchid value to hdl and docs 2021-11-28 19:53:49 +00:00
..
fpga Hook up Zb* extension params on iCEBreaker FPGA 2021-11-26 01:44:57 +00:00
libfpga@9d50e12e01 Bump libfpga for correct bus error response from AHBL splitter in example SoC 2021-11-28 01:35:52 +00:00
soc Add Hazard3's registered marchid value to hdl and docs 2021-11-28 19:53:49 +00:00
synth Remove flash XIP from example_soc -- keep it simple and reclaim UART FTDI pins on iCEBreaker 2021-11-21 15:55:52 +00:00
icebreaker-openocd.cfg Small code cleanup 2021-07-24 10:08:27 +01:00
ulx3s-openocd.cfg Working ECP5 debug, seems a bit slow but maybe just due to bitbanged FT231X JTAG. 2021-07-23 18:32:47 +01:00