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arith
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Add separate define HAZARD3_ASSERTIONS for enabling internal assertions,
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2022-06-25 20:08:40 +01:00 |
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debug
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First pass at hart array mask register in DM
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2022-06-25 20:34:53 +01:00 |
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hazard3.f
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Integrate PMP, and fix a couple of PMP bugs
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2022-05-24 19:57:45 +01:00 |
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hazard3_config.vh
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First pass at adding branch prediction
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2022-06-15 02:05:46 +01:00 |
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hazard3_config_inst.vh
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Add 'everything but MHARTID' option to config_inst, to allow its reuse in multicore instantiations.
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2022-06-25 13:11:40 +01:00 |
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hazard3_core.v
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Add separate define HAZARD3_ASSERTIONS for enabling internal assertions,
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2022-06-25 20:08:40 +01:00 |
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hazard3_cpu_1port.v
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Update copyright years
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2022-06-09 00:12:01 +01:00 |
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hazard3_cpu_2port.v
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Update copyright years
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2022-06-09 00:12:01 +01:00 |
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hazard3_csr.v
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Add separate define HAZARD3_ASSERTIONS for enabling internal assertions,
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2022-06-25 20:08:40 +01:00 |
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hazard3_csr_addr.vh
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First pass at U-mode CSR support. Bizarrely causes CXXRTL tb to not write to stdout when invoked by subprocess.run from Python.
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2022-05-24 16:17:54 +01:00 |
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hazard3_decode.v
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Add separate define HAZARD3_ASSERTIONS for enabling internal assertions,
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2022-06-25 20:08:40 +01:00 |
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hazard3_frontend.v
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Add separate define HAZARD3_ASSERTIONS for enabling internal assertions,
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2022-06-25 20:08:40 +01:00 |
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hazard3_instr_decompress.v
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Update copyright years
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2022-06-09 00:12:01 +01:00 |
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hazard3_ops.vh
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ecall from U-mode has a different mcause value than ecall from M-mode
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2022-05-28 12:07:29 +01:00 |
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hazard3_pmp.v
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PMP config: separate granularity config from hardwired region config. Give correct read value for G > 1.
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2022-06-03 17:09:43 +01:00 |
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hazard3_regfile_1w2r.v
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Update copyright years
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2022-06-09 00:12:01 +01:00 |
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hazard3_width_const.vh
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Update copyright years
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2022-06-09 00:12:01 +01:00 |
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rv_opcodes.vh
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Correct the name and operation of the brev8 (formerly rev.b) instruction
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2022-05-20 15:28:18 +01:00 |
ad8f883406