Luke Wren 8b9503c804 lint: clean up a couple of width fixes in JTAG DTM, and add missing ... default case to DM acmd state machine. Also remove unnecessary clear of JTAG DR shifter on TAP reset state, which saves a bit of logic. Two width mismatches are left unfixed in the DTM (the ones with shifts) because they bizarrely increase area by 100 LUT4s when fixed.		2024-05-27 13:12:18 +01:00
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hazard3_ecp5_jtag_dtm.f	Start hacking on ECP5 JTAG DTM	2021-07-23 00:36:55 +01:00
hazard3_ecp5_jtag_dtm.v	Fix bad preprocessor conditional in ECP5 JTAG DTM	2022-09-04 23:48:58 +01:00
hazard3_jtag_dtm.f	Extract DTM bus/control logic from the JTAG-related parts	2021-07-22 19:26:25 +01:00
hazard3_jtag_dtm.v	lint: clean up a couple of width fixes in JTAG DTM, and add missing	2024-05-27 13:12:18 +01:00
hazard3_jtag_dtm_core.v	Standardise on ifndef YOSYS around default_nettype wire	2022-08-21 13:22:55 +01:00