Hazard3/example_soc
Luke Wren 924967ee72 Back off ULX3S frequency to 40 MHz -- 50 works fine but fails to close after increasing RAM from 4k to 128k 2021-07-25 13:41:04 +01:00
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fpga Back off ULX3S frequency to 40 MHz -- 50 works fine but fails to close after increasing RAM from 4k to 128k 2021-07-25 13:41:04 +01:00
libfpga@0b647a3f8e Add activity LED to iCEBreaker 2021-07-25 13:13:41 +01:00
soc Small code cleanup 2021-07-24 10:08:27 +01:00
synth Add activity LED to iCEBreaker 2021-07-25 13:13:41 +01:00
icebreaker-openocd.cfg Small code cleanup 2021-07-24 10:08:27 +01:00
ulx3s-openocd.cfg Working ECP5 debug, seems a bit slow but maybe just due to bitbanged FT231X JTAG. 2021-07-23 18:32:47 +01:00