161 lines
4.4 KiB
C
161 lines
4.4 KiB
C
#include "tb_cxxrtl_io.h"
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#include "hazard3_csr.h"
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// Check all implemented M-mode CSRs are readable, without exception (haha).
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// Check reading D-mode CSRs generates illegal instruction exceptions in M-mode.
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// These are new (priv-1.12) and may not be recognised by the toolchain:
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#define mconfigptr 0xf15
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#define mstatush 0x310
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// Exceptions here are: medeleg, mideleg, tdata1, dcsr, dpc, dscratch1,
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// dscratch0, dmdata0 (custom). medeleg/mideleg are just a couple of
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// unimplemented registers sprinkled in for a sanity check, and the remainder
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// are D-mode registers.
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//
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// Note we permit reads but not writes to tselect, to work around a logic
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// error in openocd. Planning to implement triggers at some point, so this
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// oddity will vanish.
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/*EXPECTED-OUTPUT***************************************************************
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-> exception, mcause = 2
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CSR was 302
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-> exception, mcause = 2
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CSR was 303
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-> exception, mcause = 2
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CSR was 7a1
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-> exception, mcause = 2
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CSR was 7b0
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-> exception, mcause = 2
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CSR was 7b1
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-> exception, mcause = 2
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CSR was 7b2
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-> exception, mcause = 2
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CSR was 7b3
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-> exception, mcause = 2
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CSR was bff
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*******************************************************************************/
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int main() {
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(void)read_csr(mvendorid);
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(void)read_csr(marchid);
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(void)read_csr(mimpid);
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(void)read_csr(mhartid);
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(void)read_csr(mconfigptr);
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(void)read_csr(misa);
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(void)read_csr(mstatus);
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(void)read_csr(mstatush);
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(void)read_csr(medeleg);
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(void)read_csr(mideleg);
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(void)read_csr(mie);
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(void)read_csr(mip);
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(void)read_csr(mtvec);
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(void)read_csr(mscratch);
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(void)read_csr(mepc);
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(void)read_csr(mcause);
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(void)read_csr(mtval);
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(void)read_csr(mcycle);
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(void)read_csr(mcycleh);
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(void)read_csr(minstret);
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(void)read_csr(minstreth);
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(void)read_csr(mhpmcounter3);
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(void)read_csr(mhpmcounter4);
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(void)read_csr(mhpmcounter5);
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(void)read_csr(mhpmcounter6);
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(void)read_csr(mhpmcounter7);
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(void)read_csr(mhpmcounter8);
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(void)read_csr(mhpmcounter9);
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(void)read_csr(mhpmcounter10);
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(void)read_csr(mhpmcounter11);
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(void)read_csr(mhpmcounter12);
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(void)read_csr(mhpmcounter13);
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(void)read_csr(mhpmcounter14);
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(void)read_csr(mhpmcounter15);
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(void)read_csr(mhpmcounter16);
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(void)read_csr(mhpmcounter17);
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(void)read_csr(mhpmcounter18);
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(void)read_csr(mhpmcounter19);
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(void)read_csr(mhpmcounter20);
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(void)read_csr(mhpmcounter21);
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(void)read_csr(mhpmcounter22);
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(void)read_csr(mhpmcounter23);
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(void)read_csr(mhpmcounter24);
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(void)read_csr(mhpmcounter25);
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(void)read_csr(mhpmcounter26);
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(void)read_csr(mhpmcounter27);
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(void)read_csr(mhpmcounter28);
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(void)read_csr(mhpmcounter29);
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(void)read_csr(mhpmcounter30);
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(void)read_csr(mhpmcounter31);
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(void)read_csr(mhpmcounter3h);
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(void)read_csr(mhpmcounter4h);
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(void)read_csr(mhpmcounter5h);
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(void)read_csr(mhpmcounter6h);
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(void)read_csr(mhpmcounter7h);
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(void)read_csr(mhpmcounter8h);
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(void)read_csr(mhpmcounter9h);
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(void)read_csr(mhpmcounter10h);
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(void)read_csr(mhpmcounter11h);
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(void)read_csr(mhpmcounter12h);
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(void)read_csr(mhpmcounter13h);
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(void)read_csr(mhpmcounter14h);
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(void)read_csr(mhpmcounter15h);
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(void)read_csr(mhpmcounter16h);
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(void)read_csr(mhpmcounter17h);
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(void)read_csr(mhpmcounter18h);
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(void)read_csr(mhpmcounter19h);
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(void)read_csr(mhpmcounter20h);
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(void)read_csr(mhpmcounter21h);
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(void)read_csr(mhpmcounter22h);
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(void)read_csr(mhpmcounter23h);
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(void)read_csr(mhpmcounter24h);
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(void)read_csr(mhpmcounter25h);
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(void)read_csr(mhpmcounter26h);
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(void)read_csr(mhpmcounter27h);
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(void)read_csr(mhpmcounter28h);
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(void)read_csr(mhpmcounter29h);
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(void)read_csr(mhpmcounter30h);
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(void)read_csr(mhpmcounter31h);
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(void)read_csr(cycle);
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(void)read_csr(cycleh);
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(void)read_csr(instret);
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(void)read_csr(instreth);
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(void)read_csr(mcountinhibit);
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(void)read_csr(mhpmevent3);
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(void)read_csr(tselect);
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(void)read_csr(tdata1);
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(void)read_csr(dcsr);
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(void)read_csr(dpc);
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(void)read_csr(dscratch0);
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(void)read_csr(dscratch1);
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(void)read_csr(hazard3_csr_dmdata0);
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(void)read_csr(hazard3_csr_meie0);
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(void)read_csr(hazard3_csr_meip0);
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(void)read_csr(hazard3_csr_mlei);
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return 0;
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}
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void __attribute__((interrupt)) handle_exception() {
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tb_printf("-> exception, mcause = %u\n", read_csr(mcause));
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write_csr(mcause, 0);
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uint32_t mepc = read_csr(mepc);
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if ((*(uint16_t*)mepc & 0x3) == 0x3) {
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tb_printf("CSR was %03x\n", *(uint16_t*)(mepc + 2) >> 4);
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mepc += 4;
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}
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else {
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tb_puts("Exception on 16-bit instruction?!\n");
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tb_exit(-1);
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}
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write_csr(mepc, mepc);
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}
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