From 2243afcb6e023873f6808823934df4eecf7e635a Mon Sep 17 00:00:00 2001 From: Kainan Cha Date: Wed, 20 Oct 2021 17:20:47 +0800 Subject: [PATCH] Fix CI badge Signed-off-by: Kainan Cha --- .github/workflows/cmake_x86_vsim_unit_test.yml | 4 ++-- README.md | 3 ++- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/.github/workflows/cmake_x86_vsim_unit_test.yml b/.github/workflows/cmake_x86_vsim_unit_test.yml index d6e6bd8..ea70398 100644 --- a/.github/workflows/cmake_x86_vsim_unit_test.yml +++ b/.github/workflows/cmake_x86_vsim_unit_test.yml @@ -1,4 +1,4 @@ -name: x86_vsim_unit_test +name: cmake_x86_vsim_unit_test on: # push: @@ -35,4 +35,4 @@ jobs: export LD_LIBRARY_PATH=`pwd`/prebuilt-sdk/x86_64_linux/lib export VIVANTE_SDK_DIR=`pwd`/prebuilt-sdk/x86_64_linux/ cd ${{github.workspace}}/build/src/tim/ - ./unit_test \ No newline at end of file + ./unit_test diff --git a/README.md b/README.md index 0891fb5..f2b7e6a 100644 --- a/README.md +++ b/README.md @@ -1,7 +1,8 @@ # TIM-VX - Tensor Interface Module -![VSim.X86.UnitTest](https://github.com/VeriSilicon/TIM-VX/actions/workflows/x86_vsim_unit_test.yml/badge.svg) +![Bazel.VSim.X86.UnitTest](https://github.com/VeriSilicon/TIM-VX/actions/workflows/bazel_x86_vsim_unit_test.yml/badge.svg) +![CMake.VSim.X86.UnitTest](https://github.com/VeriSilicon/TIM-VX/actions/workflows/cmake_x86_vsim_unit_test.yml/badge.svg) TIM-VX is a software integration module provided by VeriSilicon to facilitate deployment of Neural-Networks on Verisilicon ML accelerators. It serves as the backend binding for runtime frameworks such as Android NN, Tensorflow-Lite, MLIR, TVM and more.