Fix CI badge
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
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@ -1,4 +1,4 @@
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name: x86_vsim_unit_test
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name: cmake_x86_vsim_unit_test
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on:
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on:
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# push:
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# push:
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@ -35,4 +35,4 @@ jobs:
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export LD_LIBRARY_PATH=`pwd`/prebuilt-sdk/x86_64_linux/lib
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export LD_LIBRARY_PATH=`pwd`/prebuilt-sdk/x86_64_linux/lib
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export VIVANTE_SDK_DIR=`pwd`/prebuilt-sdk/x86_64_linux/
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export VIVANTE_SDK_DIR=`pwd`/prebuilt-sdk/x86_64_linux/
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cd ${{github.workspace}}/build/src/tim/
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cd ${{github.workspace}}/build/src/tim/
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./unit_test
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./unit_test
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@ -1,7 +1,8 @@
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# TIM-VX - Tensor Interface Module
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# TIM-VX - Tensor Interface Module
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TIM-VX is a software integration module provided by VeriSilicon to facilitate deployment of Neural-Networks on Verisilicon ML accelerators. It serves as the backend binding for runtime frameworks such as Android NN, Tensorflow-Lite, MLIR, TVM and more.
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TIM-VX is a software integration module provided by VeriSilicon to facilitate deployment of Neural-Networks on Verisilicon ML accelerators. It serves as the backend binding for runtime frameworks such as Android NN, Tensorflow-Lite, MLIR, TVM and more.
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