Fixed conv2d grouped_conv2d deconv2d layoutinfer bug (#622)
Signed-off-by: Chen <jack.chen@verisilicon.com> Co-authored-by: Chen <jack.chen@verisilicon.com>
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315adcf076
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@ -36,7 +36,8 @@ TEST(LayoutInference, simple_conv2d) {
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kernel_shape[0], tim::vx::PadType::AUTO,
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std::array<uint32_t, 2>({kernel_shape[2], kernel_shape[1]}),
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std::array<uint32_t, 2>({1, 1}), std::array<uint32_t, 2>({0, 0}),
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std::array<uint32_t, 4>({0, 0, 0, 0}), 0, tim::vx::DataLayout::CWHN);
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std::array<uint32_t, 4>({0, 0, 0, 0}), 0, tim::vx::DataLayout::CWHN,
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tim::vx::DataLayout::IcWHOc);
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(*conv2d).BindInputs({input, kernel, bias}).BindOutput(output);
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// Do layout inference
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auto transform = tim::transform::LayoutInference(src_graph, ctx);
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@ -67,8 +67,8 @@ class Conv2dLayoutInfer : public OpLayoutInfer {
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case vx::DataLayout::IcWHOc: // Support nnapi & tflite Kernel Layout
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weight_required_pv = std::make_shared<PermuteVector<4>>(kIcWHOc2WHIcOc);
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break;
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default: // Default set to IWHO for compatibility with previous APIs
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weight_required_pv = std::make_shared<PermuteVector<4>>(kIcWHOc2WHIcOc);
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default:
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weight_required_pv = std::make_shared<PermuteVector<4>>();
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break;
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}
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@ -67,8 +67,8 @@ class DeConv2dLayoutInfer : public OpLayoutInfer {
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case vx::DataLayout::IcWHOc: // Support nnapi & tflite Kernel Layout
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weight_required_pv = std::make_shared<PermuteVector<4>>(kIcWHOc2WHIcOc);
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break;
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default: // Default set to IWHO for compatibility with previous APIs
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weight_required_pv = std::make_shared<PermuteVector<4>>(kIcWHOc2WHIcOc);
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default:
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weight_required_pv = std::make_shared<PermuteVector<4>>();
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break;
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}
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@ -67,8 +67,8 @@ class GroupedConv2dLayoutInfer : public OpLayoutInfer {
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case vx::DataLayout::IcWHOc: // Support nnapi & tflite Kernel Layout
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weight_required_pv = std::make_shared<PermuteVector<4>>(kIcWHOc2WHIcOc);
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break;
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default: // Default set to IWHO for compatibility with previous APIs
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weight_required_pv = std::make_shared<PermuteVector<4>>(kIcWHOc2WHIcOc);
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default:
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weight_required_pv = std::make_shared<PermuteVector<4>>();
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break;
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}
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@ -42,7 +42,8 @@ TEST(Pad, layout_inference) {
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std::array<uint32_t, 2> dilation({1, 1});
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auto op1 = graph->CreateOperation<tim::vx::ops::Conv2d>(
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tim::vx::PadType::VALID, stride, dilation, 0, tim::vx::DataLayout::CWHN);
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tim::vx::PadType::VALID, stride, dilation, 0, tim::vx::DataLayout::CWHN,
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tim::vx::DataLayout::IcWHOc);
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(*op1)
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.BindInputs({input_tensor, kernel_tensor})
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.BindOutputs({conv2dout_tensor});
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@ -46,7 +46,8 @@ TEST(Stack, DISABLED_LayoutinferernceTest_1) {
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std::array<uint32_t, 2> dilation({1, 1});
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auto op1 = graph->CreateOperation<tim::vx::ops::Conv2d>(
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tim::vx::PadType::VALID, stride, dilation, 0, tim::vx::DataLayout::CWHN);
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tim::vx::PadType::VALID, stride, dilation, 0, tim::vx::DataLayout::CWHN,
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tim::vx::DataLayout::IcWHOc);
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(*op1)
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.BindInputs({input_tensor, kernel_tensor})
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.BindOutputs({conv2dout_tensor});
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@ -115,7 +116,8 @@ TEST(Stack, LayoutinferernceTest_2) {
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std::array<uint32_t, 2> dilation({1, 1});
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auto op1 = graph->CreateOperation<tim::vx::ops::Conv2d>(
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tim::vx::PadType::VALID, stride, dilation, 0, tim::vx::DataLayout::CWHN);
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tim::vx::PadType::VALID, stride, dilation, 0, tim::vx::DataLayout::CWHN,
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tim::vx::DataLayout::IcWHOc);
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(*op1)
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.BindInputs({input_tensor, kernel_tensor})
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.BindOutputs({conv2dout_tensor});
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@ -188,12 +190,14 @@ TEST(Stack, LayoutinferernceTest_3) {
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std::array<uint32_t, 2> stride({1, 1});
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std::array<uint32_t, 2> dilation({1, 1});
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auto op1 = graph->CreateOperation<tim::vx::ops::Conv2d>(
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tim::vx::PadType::VALID, stride, dilation, 0, tim::vx::DataLayout::CWHN);
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tim::vx::PadType::VALID, stride, dilation, 0, tim::vx::DataLayout::CWHN,
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tim::vx::DataLayout::IcWHOc);
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(*op1)
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.BindInputs({input_tensor, kernel_tensor})
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.BindOutputs({conv2dout_tensor});
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auto op11 = graph->CreateOperation<tim::vx::ops::Conv2d>(
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tim::vx::PadType::VALID, stride, dilation, 0, tim::vx::DataLayout::CWHN);
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tim::vx::PadType::VALID, stride, dilation, 0, tim::vx::DataLayout::CWHN,
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tim::vx::DataLayout::IcWHOc);
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(*op11)
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.BindInputs({input2_tensor, kernel2_tensor})
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.BindOutputs({conv2dout2_tensor});
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@ -52,7 +52,8 @@ TEST(StridedSlice, endmask_2_shrinkmask_2) {
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std::array<uint32_t, 2> dilation({1, 1});
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auto op1 = graph->CreateOperation<tim::vx::ops::Conv2d>(
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tim::vx::PadType::VALID, stride, dilation, 0, tim::vx::DataLayout::CWHN);
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tim::vx::PadType::VALID, stride, dilation, 0, tim::vx::DataLayout::CWHN,
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tim::vx::DataLayout::IcWHOc);
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(*op1)
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.BindInputs({input_tensor, kernel_tensor})
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.BindOutputs({conv2dout_tensor});
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@ -118,7 +119,8 @@ TEST(StridedSlice, endmask_6_shrinkmask_5) {
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std::array<uint32_t, 2> dilation({1, 1});
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auto op1 = graph->CreateOperation<tim::vx::ops::Conv2d>(
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tim::vx::PadType::VALID, stride, dilation, 0, tim::vx::DataLayout::CWHN);
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tim::vx::PadType::VALID, stride, dilation, 0, tim::vx::DataLayout::CWHN,
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tim::vx::DataLayout::IcWHOc);
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(*op1)
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.BindInputs({input_tensor, kernel_tensor})
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.BindOutputs({conv2dout_tensor});
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@ -187,7 +189,8 @@ TEST(StridedSlice, endmask_1_shrinkmask_1) {
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std::array<uint32_t, 2> dilation({1, 1});
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auto op1 = graph->CreateOperation<tim::vx::ops::Conv2d>(
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tim::vx::PadType::VALID, stride, dilation, 0, tim::vx::DataLayout::CWHN);
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tim::vx::PadType::VALID, stride, dilation, 0, tim::vx::DataLayout::CWHN,
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tim::vx::DataLayout::IcWHOc);
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(*op1)
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.BindInputs({input_tensor, kernel_tensor})
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.BindOutputs({conv2dout_tensor});
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@ -254,7 +257,8 @@ TEST(StridedSlice, beginmask_9_endmask_15) {
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std::array<uint32_t, 2> dilation({1, 1});
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auto op1 = graph->CreateOperation<tim::vx::ops::Conv2d>(
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tim::vx::PadType::VALID, stride, dilation, 0, tim::vx::DataLayout::CWHN);
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tim::vx::PadType::VALID, stride, dilation, 0, tim::vx::DataLayout::CWHN,
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tim::vx::DataLayout::IcWHOc);
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(*op1)
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.BindInputs({input_tensor, kernel_tensor})
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.BindOutputs({conv2dout_tensor});
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