From 8f1c33ea834834e12fc460246e45d39190d7b207 Mon Sep 17 00:00:00 2001
From: "yuenan.li" <yuenan.li@verisilicon.com>
Date: Wed, 10 Mar 2021 20:08:57 +0800
Subject: [PATCH] add README.md for op support

Signed-off-by: yuenan.li <yuenan.li@verisilicon.com>
---
 src/tim/vx/ops/README.md | 147 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 147 insertions(+)
 create mode 100644 src/tim/vx/ops/README.md

diff --git a/src/tim/vx/ops/README.md b/src/tim/vx/ops/README.md
new file mode 100644
index 0000000..481f59e
--- /dev/null
+++ b/src/tim/vx/ops/README.md
@@ -0,0 +1,147 @@
+TIM-VX API |Internal Op |Status
+:------    |:----- |:------
+Add|ADD|Mapped
+Multiply|MULTIPLY|Mapped
+Conv2d|CONV2D|Mapped
+||CONV_RELU|Unmapped
+||CONV_RELU_POOL|Unmapped
+FullyConnected|FCL|Mapped
+||FCL_RELU|Unmapped
+Softmax|SOFTMAX|Mapped
+Pool2d|POOL|Mapped
+LeakyRelu|LEAKY_RELU|Mapped
+||LRN|Unmapped
+Concat|CONCAT|Mapped
+Split|SPLIT|Mapped
+||NOOP|Unmapped
+||ROI_POOL|Unmapped
+||BATCH_NORM|Unmapped
+||PROPOSAL|Unmapped
+DeConv2d|DECONVOLUTION|Mapped
+Reshape|RESHAPE|Mapped
+Transpose|PERMUTE|Mapped
+Prelu|PRELU|Mapped
+||UPSAMPLE|Unmapped
+Relu|RELU|Mapped
+||RELUN|Unmapped
+||LSTM|Unmapped
+||REORG|Unmapped
+||VARIABLE|Unmapped
+L2Normalization|L2_NORMALIZE|Mapped
+||FCL2|Unmapped
+||POOLWITHARGMAX|Unmapped
+||ARGMAX|Unmapped
+Maximum|MAXIMUM|Mapped
+L2Normalization|L2NORMALIZESCALE|Mapped
+||CROP|Unmapped
+Sub|SUBTRACT|Mapped
+Relu6|RELU6|Mapped
+Sigmoid|SIGMOID|Mapped
+Tanh|TANH|Mapped
+Sqrt|SQRT|Mapped
+Rsqrt|RSQRT|Mapped
+||SOFTRELU|Unmapped
+Div|DIVIDE|Mapped
+||DROPOUT|Unmapped
+||SHUFFLECHANNEL|Unmapped
+Resize|RESIZE|Mapped
+Reverse|REVERSE|Mapped
+DepthToSpace|DEPTH2SPACE|Mapped
+SpaceToDepth|SPACE2DEPTH|Mapped
+DataConvert|DATACONVERT|Mapped
+||SCALE|Unmapped
+Slice|SLICE|Mapped
+Elu|ELU|Mapped
+Batch2Space|BATCH2SPACE|Mapped
+Space2Batch|SPACE2BATCH|Mapped
+Pad|PAD|Mapped
+||IMAGEPROCESS|Unmapped
+||MATRIXMUL|Unmapped
+||LSTMUNIT|Unmapped
+||LAYER_NORM|Unmapped
+Min/Max/Any/prod/Mean|REDUCE|Mapped
+||INSTANCE_NORM|Unmapped
+||TENSORSTACKCONCAT|Unmapped
+StridedSlice|STRIDED_SLICE|Mapped
+||SIGNAL_FRAME|Unmapped
+||A_TIMES_B_PLUS_C|Unmapped
+||SVDF|Unmapped
+Abs|ABS|Mapped
+||CONV1D|Unmapped
+NBG|NBG|Mapped
+||CONCATSHIFT|Unmapped
+LocalResponseNormalization|LRN2|Mapped
+||RELATIONAL_OPS|Unmapped
+||SYNC_HOST|Unmapped
+Pow|POW|Mapped
+||FLOORDIV|Unmapped
+Minimum|MINIMUM|Mapped
+||SPATIAL_TRANSFORMER|Unmapped
+And/Or|LOGICAL_OPS|Mapped
+Select|SELECT|Mapped
+||LSTMUNIT_ACTIVATION|Unmapped
+||LSTMUNIT_OVXLIB|Unmapped
+||TENSOR_ADD_MEAN_STDDEV_NORM|Unmapped
+Relu1|RELU1|Mapped
+||STACK|Unmapped
+||FLOOR|Unmapped
+Square|SQUARE|Mapped
+Neg|NEG|Mapped
+Exp|EXP|Mapped
+||LSTM_OVXLIB|Unmapped
+||PRE_PROCESS_TENSOR|Unmapped
+||HASHTABLE_LOOKUP|Unmapped
+||EMBEDDING_LOOKUP|Unmapped
+||LSH_PROJECTION|Unmapped
+||RNN|Unmapped
+||CLIP|Unmapped
+||POST_PROCESS|Unmapped
+||PRE_PROCESS_GRAY|Unmapped
+||UNSTACK|Unmapped
+||PRE_PROCESS_RGB|Unmapped
+||PRE_PROCESS|Unmapped
+AddN|ADDN|Mapped
+||PRE_PROCESS_YUV420|Unmapped
+||EXTRA_ENDING|Unmapped
+Gather|GATHER|Mapped
+||TILE|Unmapped
+||GROUPED_CONV2D|Unmapped
+||TOPK|Unmapped
+||PRE_PROCESS_BGRA|Unmapped
+LogicalNot|LOGICAL_NOT|Mapped
+Sin|SIN|Mapped
+Log|LOG|Mapped
+||ARGMIN|Unmapped
+||ROI_ALIGN|Unmapped
+||HEATMAP_MAX_KEYPOINT|Unmapped
+||AXIS_ALIGNED_BBOX_TRANSFORM|Unmapped
+||BOX_WITH_NMS_LIMIT|Unmapped
+||GENERATE_PROPOSALS|Unmapped
+||DETECTION_POSTPROCESS|Unmapped
+||RANDOM_MULTINOMIAL|Unmapped
+||LOG_SOFTMAX|Unmapped
+||RELU_KERAS|Unmapped
+||GRU_OVXLIB|Unmapped
+||GRUCELL_OVXLIB|Unmapped
+||UNIDIRECTIONAL_SEQUENCE_RNN|Unmapped
+||QUANTIZED_16BIT_LSTM|Unmapped
+||BIDIRECTIONAL_SEQUENCE_RNN|Unmapped
+||BIDIRECTIONAL_SEQUENCE_LSTM|Unmapped
+||RNNCELL_OVXLIB|Unmapped
+HardSwish|SWISH|Mapped
+||DEPTHWISE_CONV1D|Unmapped
+GatherNd|GATHER_ND|Mapped
+||CAST|Unmapped
+||LINEAR|Unmapped
+||BATCHNORM_SINGLE|Unmapped
+||MOMENTS|Unmapped
+||SQUEEZE|Unmapped
+||HARD_SIGMOID|Unmapped
+||MISH|Unmapped
+||EXPAND_BROADCAST|Unmapped
+||PRE_PROCESS_YUV444|Unmapped
+||PRE_PROCESS_NV12|Unmapped
+||SCATTER_ND|Unmapped
+||DECONVOLUTION1D|Unmapped
+||INTERP|Unmapped
+||RESIZE_1D|Unmapped