Update x86_64_linux/include for 22Q3
update prebuilt-sdk/x86_64_linux/include update VERSION file Type: Code Improvement Signed-off-by: Feiyue Chen <Feiyue.Chen@verisilicon.com>
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6.4.11
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6.4.12_CL562241A_D561555_A558512_R558399_T558462_Oeb44e5c
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@ -63,6 +63,8 @@ enum vx_graph_attribute_internal_type_e
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VX_GRAPH_DATA_COMPRESSION_RATIO = VX_ATTRIBUTE_BASE(VX_ID_VIVANTE, VX_TYPE_GRAPH) + 0x7,
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VX_GRAPH_ISP_EMULATION_PARAMETER = VX_ATTRIBUTE_BASE(VX_ID_VIVANTE, VX_TYPE_GRAPH) + 0x8,
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VX_GRAPH_PROCESS_FPS = VX_ATTRIBUTE_BASE(VX_ID_VIVANTE, VX_TYPE_GRAPH) + 0x9,
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/*This parameter.come from customer, not used by unify driver but lite driver*/
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VX_GRAPH_CUSTOMER_PARAMETER_FOR_NBG = VX_ATTRIBUTE_BASE(VX_ID_VIVANTE, VX_TYPE_GRAPH) + 0xA,
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};
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/*! \brief Size Alignment of User Memory
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@ -228,6 +228,14 @@ typedef struct _vx_nn_convolution_relu_pooling_params_ext5_t
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vx_spinst spinst_obj;
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} vx_nn_convolution_relu_pooling_params_ext5_t, * vx_nn_convolution_relu_pooling_params_ext5;
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typedef struct _vx_nn_convolution_relu_pooling_params_ext6_t
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{
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vx_nn_convolution_relu_pooling_params_ext5_t ext5; /*!< \brief convolution relu pooling params <tt>\ref vx_nn_convolution_relu_pooling_params_ext_t</tt> */
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vx_uint32 depth2space_block_x; /*!< \brief hw limitation: value between 2 and 16. 2, 16 included. */
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vx_uint32 depth2space_block_y; /*!< \brief hw limitation: equals value of depth2space_block_x. */
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} vx_nn_convolution_relu_pooling_params_ext6_t, * vx_nn_convolution_relu_pooling_params_ext6;;
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/*! \brief [Graph] Creates a Convolutional Network Convolution and Activation(Relu) and Pooling Layer Node, this fucntion match kronos NN Extension 1.2 verion.
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* \details This function implement Convolutional Network Convolution and Activation(Relu) and Pooling layer.
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* For fixed-point data types, a fixed point calculation is performed with round and saturate according to the number of accumulator bits. The number of the accumulator bits are implementation defined,
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@ -166,6 +166,13 @@ typedef enum _vx_sp_attribute_e
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VX_SP_ATTRIBUTE_SUM_ENGINE_NUM_CH_MINUS_ONE,
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VX_SP_ATTRIBUTE_SUM_ENGINE_2D_ACCUM_STORAGE,
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VX_SP_ATTRIBUTE_NUM_OF_ELEMENTS_PER_LOOP_PER_INPUT,
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VX_SP_ATTRIBUTE_NUM_OF_V11_RD_IN_FLUSH_CYCLE,
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VX_SP_ATTRIBUTE_NUM_OF_V12_RD_IN_FLUSH_CYCLE,
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VX_SP_ATTRIBUTE_NUM_OF_V11_WR_IN_FLUSH_CYCLE,
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VX_SP_ATTRIBUTE_NUM_OF_V12_WR_IN_FLUSH_CYCLE,
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VX_SP_ATTRIBUTE_GENERAL_COUNT,
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VX_SP_ATTRIBUTE_CONST0, /* NN post multiplier */
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@ -1986,9 +1986,11 @@ enum vx_map_flag_e {
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enum vx_const_tensor_cache_mode
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{
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VX_PRELOAD_NULL = 0,
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VX_PRELOAD_NULL = 0,
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VX_PRELOAD_CONST_TENSOR_VIPSRAM = 1,
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VX_PRELOAD_CONST_TENSOR_AXISRAM = 2,
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VX_KERNEL_CACHE_PARTIAL_MODE = 3,
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VX_KERNEL_CACHE_STREAM_MODE = 4,
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VX_PRELOAD_TYPE_COUNT
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};
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#endif
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