colin
/
TIM-VX
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

enable no bias in FC layout inference (#294) 

Signed-off-by: yuenan.li <yuenan.li@verisilicon.com>

Co-authored-by: yuenan.li <yuenan.li@verisilicon.com>
This commit is contained in:
liyuenan 2022-02-21 19:09:38 +08:00 committed by GitHub
parent 6e0ac09c92
commit fe31a47bf9
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 5 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
src/tim/transform/ops/fullyconnected_layout_inference.h
View File

@ -53,19 +53,15 @@ class FullyConnectedLayoutInfer : public OpLayoutInfer {
context_->SetPermuteVector(in, trans_pv);
}
}
uint32_t axis = op_->impl()->node()->nn_param.fcl.axis;
uint32_t weight = op_->impl()->node()->nn_param.fcl.weights;
auto fcl = context_->infer_graph_->CreateOperation<vx::ops::FullyConnected>(
axis, weight);
auto fcl = op_->Clone(context_->infer_graph_);
auto required_pv =
MakeShared(op_->impl()->OutputsTensor()[0]->GetShape().size());
auto out_infer = CreateOutputsTensor(required_pv);
(*fcl)
.BindInputs({context_->GetMapedTensor(op_->impl()->InputsTensor()[0]),
context_->GetMapedTensor(op_->impl()->InputsTensor()[1]),
context_->GetMapedTensor(op_->impl()->InputsTensor()[2])})
.BindOutput(out_infer[0]);
for (auto in : op_->impl()->InputsTensor()) {
(*fcl).BindInput(context_->GetMapedTensor(in));
}
(*fcl).BindOutput(out_infer[0]);
context_->SetPermuteVector(op_->impl()->OutputsTensor()[0], required_pv);
next_tensors.push_back(op_->impl()->OutputsTensor()[0]);
}