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29 Commits

Author SHA1 Message Date
zhao.xia 0a034252c6 Support tim-lite 
Lite module for vip lite driver.

Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
 2021-05-14 17:37:35 +08:00
Zongwu.Yang b38cad9f1d
Add data layout for kernel to support TVM conv2d (#40) 
Signed-off-by: Zongwu Yang <zongwu.yang@verisilicon.com>
 2021-05-14 14:00:02 +08:00
liyuenan 748274143b
support layout inference for operations (#39) 
Add layout inference support for space2depth, depth2space, space2batch, batch2space, pad and
reduce.

Signed-off-by: yuenan.li <yuenan.li@verisilicon.com>

Co-authored-by: yuenan.li <yuenan.li@verisilicon.com>
 2021-05-13 22:27:23 +08:00
Kainan Cha d645494dcc Refine support for data copy operation 
* Properly support tensor handle for both input and output
* Fix UT to use size_in_bytes instead of size in elements

Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-05-12 22:59:36 +08:00
Kainan Cha 301d88a5a6 Add support for relational ops 
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-05-11 23:39:22 +08:00
Kainan Cha d92e08e502 Add support for Cast and Floor operation 
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-05-11 18:45:28 +08:00
Kainan Cha 2b29d5d41c Fix file permission 
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-05-11 11:01:21 +08:00
Kainan Cha c2e10efb50 Add support for Reorg 
The Reorg implementation is that of YOLOv2.

Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-05-11 10:57:56 +08:00
Sven a42517fdce
Align directory name to namespace for layout inference (#38) 
Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
 2021-05-11 09:46:46 +08:00
Zongwu.Yang 22d423714f
Optimize permute op for constant tensor (#37) 
Signed-off-by: Zongwu Yang <zongwu.yang@verisilicon.com>
 2021-05-10 23:06:04 +08:00
xiang.zhang 205f7d53f0 Align declare and definition for TensorSpec 
Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
 2021-05-08 11:46:05 +08:00
Zongwu.Yang 77b801a590
Add layout inference feature (#34) 
* mobilenet_v1_1.0_224_quant.tflite pass
* inception_v1_224_quant.tflite pass
* ssd_mobilenet_v2_fpnlite_320x320_coco17_quant.tflite pass

Signed-off-by: Zongwu Yang <zongwu.yang@verisilicon.com>
 2021-05-08 09:29:47 +08:00
zhengzhouheng eff71c38bf add argmin and argmax op 2021-04-16 00:34:29 +08:00
yuenan.li c9d3416c6b Add the Squeeze op 
Signed-off-by: yuenan.li <yuenan.li@verisilicon.com>
 2021-04-15 11:22:48 +08:00
Jia 11480f18f3 Store operation into graph 
because the operation is a shared pointor, in app, the operation is
created as:
    auto op = graph->CreateOperation();

uses natively think the operation had been register into the graph and
would not manage the op locally.

if running the graph in another fucntion instead of the function that
create the operation, the operation would had been delete.

so the operation should be stored into the graph.

Signed-off-by: Jia <juku.jia@verisilicon.com>
 2021-04-15 11:21:56 +08:00
zhengzhouheng dc67e9ac63 add the Stack op 2021-04-07 19:57:28 +08:00
Kainan Cha 165b3fcf8f Minor clean up 
Fix typos and move functions into appropriate files

Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
 2021-04-07 13:03:56 +08:00
zhengzhouheng 07fc3b9914 add the clip, dropout, batchnorm op 2021-04-07 13:00:41 +08:00
Kainan Cha 90a52ea6c9 Add support for Mish, SoftRelu and HardSigmoid 
Signed-off-by: Kainan Cha <kainan.cha@verisilicon.com>
 2021-03-31 12:00:02 +08:00
yuenan.li b5f2666e92 Map Select 
Signed-off-by: yuenan.li <yuenan.li@verisilicon.com>
 2021-03-25 17:27:04 +08:00
Kainan Cha 0d7afd9d51 Minor cleanup 
Signed-off-by: Kainan Cha <kainan.cha@verisilicon.com>
 2021-03-19 11:12:12 +08:00
Kainan Cha c46904c339 Add op support for Deconv2d 
Signed-off-by: Kainan Cha <kainan.cha@verisilicon.com>
 2021-02-26 09:54:01 +08:00
zhengzhouheng c8b0180e7a fix the bug of pooling layer output shape mismatch 2021-02-24 10:15:24 +08:00
xiang.zhang 9d44b4477b Added NBG support 
Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
 2021-02-22 11:38:21 +08:00
yuenan.li bd4d277ac1 Support multiply attribute for tensor spec 
Signed-off-by: yuenan.li <yuenan.li@verisilicon.com>
 2021-02-01 14:10:03 +08:00
yuenan.li 44af63b9e9 [NNRT-811]Map Slice 
Signed-off-by: yuenan.li <yuenan.li@verisilicon.com>
 2021-01-22 14:32:43 +08:00
yuenan.li 0e422b1e6a Map [NNRT-824]LeakyRelu/[NNRT-817]LogicalOr/And/[NNRT-831]GatherNd 
Signed-off-by: yuenan.li <yuenan.li@verisilicon.com>
 2021-01-19 16:44:43 +08:00
Jiang Bo 90b7a6fc32 Rename Op 'Permute' to 'Transpose' 
Signed-off-by: Jiang Bo <bo.jiang@verisilicon.com>
 2021-01-12 11:21:51 +08:00
Jiang Bo 7972af0697 Initial Commit for VERSION 1.1.28 
Signed-off-by: Jiang Bo <bo.jiang@verisilicon.com>
 2021-01-11 18:27:48 +08:00