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26 Commits

Author SHA1 Message Date
Yunshan 394cedcfe6
Add NBG runner python binding (#677) 
Co-authored-by: Xiaoran Weng <xiaoran.weng@verisilicon.com>
 2024-01-10 16:31:28 +08:00
liyuenan 27890719b6
Support remote platform by gRPC (#561) 
* Support remote platform by gRPC

Signed-off-by: yuenan.li <yuenan.li@verisilicon.com>
 2023-03-28 09:51:23 +08:00
Tang d778dfb82d update copyright information 2023-01-20 12:49:48 +08:00
zhouheng.zheng 25c38d45e1 add custom op in lenet test 2022-10-28 17:43:01 +08:00
Feiyue Chen fde6d799ae Fixed multi_device compiling error in gcc 12 
fixed mismatched allocation error in  multi_device.cc

Type: Bug Fix
Signed-off-by: Feiyue Chen <Feiyue.Chen@verisilicon.com>
 2022-10-24 15:36:13 +08:00
lucklee 4bd0ce943b
add test demo for multi_device (#371) 2022-04-29 22:54:03 +08:00
Antkillerfarm dbb3631d4e
rename CopyTensorToData to CopyDataFromTensor to align name of tim::vx::Tensor (#373) 2022-04-24 13:36:51 +08:00
Sven cccd7860d6
CI enhancement - enable benchmark_model and samples (#372) 
Added Clang build check with CMAKE
Added vx-delegate build and benchmark_model test for PR.
Added tim-vx/samples in ci
Save output from build for debugging purpose.
Parallel CI execution.

Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
 2022-04-24 12:26:29 +08:00
lucklee 70d2f410a8
support virtual vip devices (#331) 2022-04-06 13:05:38 +08:00
Zhouheng Zheng d1b57e8eca
Add cmake option of custom op support (#335) 
Co-authored-by: zhouheng.zheng <zhouheng.zheng@ouotlook.com>
 2022-03-28 09:42:19 +08:00
Sven 097f8d74cd
Refine customized op support (#327) 
Signed-off-by: ZhangXiang <Xiang.Zhang@verisilicon.com>
 2022-03-22 23:00:52 +08:00
Zhouheng Zheng b02aa8b8c4
Added customize operator APIs(#315) 
Co-authored-by: zhouheng.zheng <zhouheng.zheng@ouotlook.com>
 2022-03-09 12:10:08 +08:00
chxin66 9fdba427f7
Integrate benchmark test of conv2d and depthwise conv2d (#276) 
Signed-off-by: Chen Xin <jack.chen@verisilicon.com>

Co-authored-by: Chen Xin <jack.chen@verisilicon.com>
 2022-01-21 15:32:23 +08:00
Sven 321a53fd2a
Support single static-library for libtim-vx.a (#237) 
Fix external ovxlib build failure, and change install dir to CMAKE_INSTALL_LIBDIR

Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
Co-authored-by: yuenan.li <yuenan.li@verisilicon.com>
 2021-12-15 22:23:32 +08:00
Zongwu.Yang c90efe70c5
Refine Lite API (#221) 
Signed-off-by: Zongwu Yang <zongwu.yang@verisilicon.com>
 2021-11-19 20:30:26 +08:00
Zongwu.Yang d019a76db5
Add function for lite driver handle (#209) 
Signed-off-by: Zongwu Yang <zongwu.yang@verisilicon.com>
 2021-11-10 20:05:31 +08:00
Goose Bomb 914e280209
Refactor CMake build system (#184) 
* Remove unnecessary compiler flags

* Refactor CMakeLists.txt

* Tweak CMakeLists.txt for libtim_internal

* Tweak CMakeLists.txt for libtim-vx

* Make TIM_VX_ENABLE_TEST defaults to OFF

* Eliminate usage of include_directories

* Fix CI unit test
 2021-10-12 10:44:49 +08:00
Kainan Cha d7900b9de4 Add sample to run NBG 
Signed-off-by: Kainan Cha <kainan.cha@verisilicon.com>
Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
 2021-09-27 17:21:04 +08:00
Zongwu Yang d2ea2ff7d3 Add multi thread test 
Signed-off-by: Zongwu Yang <zongwu.yang@verisilicon.com>
 2021-07-13 09:17:35 +08:00
xiang.zhang 68228c04d4 Add Bazel build support for benchmark_test 
Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
 2021-07-07 14:11:40 +08:00
xiang.zhang 853df36bd6 Add simple benchmark test for convolution op 
Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
 2021-07-07 14:11:40 +08:00
Sven 410cd8e516
Refine the cmake build (#63) 
Signed-off-by: xiang.zhang <xiang.zhang@verisilicon.com>
 2021-05-24 13:40:37 +08:00
Nightingale 90e451749f
Update tim lite api (#48) 
* Add lenet sample with TIM-LITE

A lenet sample with TIM-LITE executable.

Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>

* Update TIM-LITE API

Update handle usage.
Use Execution::Trigger instead of Execution::Exec

Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>

* Update lenet lite case to use new api

Signed-off-by: zhao.xia <zhao.xia@verisilicon.com>
 2021-05-17 22:08:10 +08:00
Zongwu.Yang c5e16157a6 Update linking style as static linking for sample 
Signed-off-by: Zongwu.Yang <Zongwu.Yang@verisilicon.com>
 2021-02-08 14:47:37 +08:00
Zongwu.Yang 5108598fd5 Add Cmake build for tim-vx 
Signed-off-by: Zongwu.Yang <Zongwu.Yang@verisilicon.com>
 2021-02-02 10:04:47 +08:00
Jiang Bo 7972af0697 Initial Commit for VERSION 1.1.28 
Signed-off-by: Jiang Bo <bo.jiang@verisilicon.com>
 2021-01-11 18:27:48 +08:00