Sven
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e6eeb5dbee
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Update component diagram and README.md (#269)
Signed-off-by: ZhangXiang <Xiang.Zhang@verisilicon.com>
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2022-01-17 01:13:20 +08:00 |
Antkillerfarm
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e001d53ddf
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remove 64bit data type from doc (#230)
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2021-11-29 11:02:44 +08:00 |
Kainan Cha
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5071ba9cd4
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Add TIM-VX Architecture overview (#197)
Signed-off-by: Kainan Cha <kainan.zha@verisilicon.com>
Co-authored-by: Kainan Cha <kainan.zha@verisilicon.com>
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2021-10-21 19:31:41 +08:00 |
Xiafei Mao
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17f0dde5ba
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Update Operators.md
Change the formula of BatchNorm Op
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2021-10-09 10:55:12 +08:00 |
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Antkillerfarm
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fa930678ea
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add Programming_Guide.md & Operators.md (#157)
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2021-08-24 12:42:46 +08:00 |
jing.tang
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ebad62ab02
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[NNRT-1111] add memory layout for doc
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2021-06-01 16:59:55 +08:00 |
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jing.tang
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3339135c82
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add docs for ops
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2021-05-21 18:39:59 +08:00 |
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jing.tang
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a85fe89cf6
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add docs for ops
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2021-05-21 18:39:59 +08:00 |