zhengzhouheng
26d3654a6a
support build for tensorflow A311D
2021-02-07 10:33:04 +08:00
Zongwu.Yang
5108598fd5
Add Cmake build for tim-vx
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Signed-off-by: Zongwu.Yang <Zongwu.Yang@verisilicon.com>
2021-02-02 10:04:47 +08:00
Sven
9f70d05765
Merge pull request #7 from liyuenan2333/select
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Support multiply attribute for tensor spec
2021-02-01 20:18:14 +08:00
yuenan.li
bd4d277ac1
Support multiply attribute for tensor spec
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Signed-off-by: yuenan.li <yuenan.li@verisilicon.com>
2021-02-01 14:10:03 +08:00
Jiang Bo
2390ece5ac
Support build for A311D
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Add cross compilation support for A311D SoC platform. A prebuilt-sdk
for aarch64 and Linux Kernel version 4.9 is provided.
basel build --config A311D //samples/lenet:lenet_asymu8_cc
Signed-off-by: Jiang Bo <bo.jiang@verisilicon.com>
Signed-off-by: Kainan Cha <kainan.cha@verisilicon.com>
2021-01-29 00:11:41 -08:00
Kainan Cha
984ab3b24a
Update build instruction in README
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Signed-off-by: Kainan Cha <kainan.cha@verisilicon.com>
2021-01-26 06:53:39 -08:00
yuenan.li
44af63b9e9
[NNRT-811]Map Slice
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Signed-off-by: yuenan.li <yuenan.li@verisilicon.com>
2021-01-22 14:32:43 +08:00
hawk081
92e62e78fc
Merge pull request #1 from liyuenan2333/main
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Map [NNRT-824]LeakyRelu/[NNRT-817]LogicalOr/And/[NNRT-831]GatherNd
2021-01-19 16:53:31 +08:00
yuenan.li
0e422b1e6a
Map [NNRT-824]LeakyRelu/[NNRT-817]LogicalOr/And/[NNRT-831]GatherNd
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Signed-off-by: yuenan.li <yuenan.li@verisilicon.com>
2021-01-19 16:44:43 +08:00
Jiang Bo
bcae0571f0
Add .clang-format
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Signed-off-by: Jiang Bo <bo.jiang@verisilicon.com>
2021-01-19 09:54:50 +08:00
Jiang Bo
90b7a6fc32
Rename Op 'Permute' to 'Transpose'
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Signed-off-by: Jiang Bo <bo.jiang@verisilicon.com>
2021-01-12 11:21:51 +08:00
Jiang Bo
7972af0697
Initial Commit for VERSION 1.1.28
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Signed-off-by: Jiang Bo <bo.jiang@verisilicon.com>
2021-01-11 18:27:48 +08:00